Commit graph

3359 commits

Author SHA1 Message Date
Richard Henderson
ea46c4bce8 tcg: Merge INDEX_op_movcond_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
b6d69fcefb tcg: Merge INDEX_op_brcond_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
a363e1e179 tcg: Merge INDEX_op_{neg}setcond_{i32,i64}`
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
d776198cd3 tcg: Merge INDEX_op_mulu2_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
bfe964809b tcg: Merge INDEX_op_muls2_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
97218ae918 tcg: Merge INDEX_op_ctpop_{i32,i64}
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
c96447d838 tcg: Merge INDEX_op_ctz_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
5a5bb0a5a0 tcg: Merge INDEX_op_clz_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
005a87e148 tcg: Merge INDEX_op_rot{l,r}_{i32,i64}
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
3949f365eb tcg: Merge INDEX_op_sar_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
74dbd36f1f tcg: Merge INDEX_op_shr_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
6ca594517a tcg: Merge INDEX_op_shl_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
cd9acd2049 tcg: Merge INDEX_op_remu_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
9a6bc1840e tcg: Merge INDEX_op_rem_{i32,i64}
Rename to INDEX_op_rems to emphasize signed inputs,
and mirroring INDEX_op_remu_*.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
8109598b68 tcg: Merge INDEX_op_divu2_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
ee1805b9e6 tcg: Merge INDEX_op_div2_{i32,i64}
Rename to INDEX_op_divs2 to emphasize signed inputs,
and mirroring INDEX_op_divu2_*.  Document the opcode.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
961b80aecd tcg: Merge INDEX_op_divu_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
b2c514f9d5 tcg: Merge INDEX_op_div_{i32,i64}
Rename to INDEX_op_divs to emphasize signed inputs,
and mirroring INDEX_op_divu_*.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
c742824dd8 tcg: Merge INDEX_op_mulsh_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
aa28c9ef8e tcg: Merge INDEX_op_muluh_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
d2c3ecadea tcg: Merge INDEX_op_mul_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
5c62d3779b tcg: Merge INDEX_op_not_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
6971358747 tcg: Merge INDEX_op_neg_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
60f34f55f1 tcg: Merge INDEX_op_sub_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
3a8c4e9e53 tcg: Merge INDEX_op_nor_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
59379a45af tcg: Merge INDEX_op_nand_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Richard Henderson
5c0968a7e1 tcg: Merge INDEX_op_eqv_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Richard Henderson
fffd3dc902 tcg: Merge INDEX_op_xor_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Richard Henderson
6aba25ebb9 tcg: Merge INDEX_op_orc_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Richard Henderson
49bd751497 tcg: Merge INDEX_op_or_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Richard Henderson
46f96bff16 tcg: Merge INDEX_op_andc_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Richard Henderson
c3b920b3d6 tcg: Merge INDEX_op_and_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Richard Henderson
79602f632a tcg: Merge INDEX_op_add_{i32,i64}
Rely on TCGOP_TYPE instead of opcodes specific to each type.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Richard Henderson
b5701261da tcg: Merge INDEX_op_mov_{i32,i64}
Begin to rely on TCGOp.type to discriminate operations,
rather than two different opcodes.  Convert mov first.
Introduce TCG_OPF_INT in order to keep opcode dumps the same.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Richard Henderson
48e8de684a tcg: Remove INDEX_op_ext{8,16,32}*
Use the fully general extract opcodes instead.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Stefan Hajnoczi
06b40d250e Various patches loosely related to single binary work:
- Replace cpu_list() definition by CPUClass::list_cpus() callback
 - Remove few MO_TE definitions on Hexagon / X86 targets
 - Remove target_ulong uses in  ARMMMUFaultInfo and ARM CPUWatchpoint
 - Remove DEVICE_HOST_ENDIAN definition
 - Evaluate TARGET_BIG_ENDIAN at compile time and use target_needs_bswap() more
 - Rename target_words_bigendian() as target_big_endian()
 - Convert target_name() and target_cpu_type() to TargetInfo API
 - Constify QOM TypeInfo class_data/interfaces fields
 - Get default_cpu_type calling machine_class_default_cpu_type()
 - Correct various uses of GLibCompareDataFunc prototype
 - Simplify ARM/Aarch64 gdb_get_core_xml_file() handling a bit
 - Move device tree files in their own pc-bios/dtb/ subdir
 - Correctly check strchrnul() symbol availability on macOS SDK
 - Move target-agnostic methods out of cpu-target.c and accel-target.c
 - Unmap canceled USB XHCI packet
 - Use deposit/extract API in designware model
 - Fix MIPS16e translation
 - Few missing header fixes
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Merge tag 'single-binary-20250425' of https://github.com/philmd/qemu into staging

Various patches loosely related to single binary work:

- Replace cpu_list() definition by CPUClass::list_cpus() callback
- Remove few MO_TE definitions on Hexagon / X86 targets
- Remove target_ulong uses in  ARMMMUFaultInfo and ARM CPUWatchpoint
- Remove DEVICE_HOST_ENDIAN definition
- Evaluate TARGET_BIG_ENDIAN at compile time and use target_needs_bswap() more
- Rename target_words_bigendian() as target_big_endian()
- Convert target_name() and target_cpu_type() to TargetInfo API
- Constify QOM TypeInfo class_data/interfaces fields
- Get default_cpu_type calling machine_class_default_cpu_type()
- Correct various uses of GLibCompareDataFunc prototype
- Simplify ARM/Aarch64 gdb_get_core_xml_file() handling a bit
- Move device tree files in their own pc-bios/dtb/ subdir
- Correctly check strchrnul() symbol availability on macOS SDK
- Move target-agnostic methods out of cpu-target.c and accel-target.c
- Unmap canceled USB XHCI packet
- Use deposit/extract API in designware model
- Fix MIPS16e translation
- Few missing header fixes

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# gpg: Signature made Fri 25 Apr 2025 11:26:55 EDT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'single-binary-20250425' of https://github.com/philmd/qemu: (58 commits)
  qemu: Convert target_name() to TargetInfo API
  accel: Move target-agnostic code from accel-target.c -> accel-common.c
  accel: Make AccelCPUClass structure target-agnostic
  accel: Include missing 'qemu/accel.h' header in accel-internal.h
  accel: Implement accel_init_ops_interfaces() for both system/user mode
  cpus: Move target-agnostic methods out of cpu-target.c
  cpus: Replace CPU_RESOLVING_TYPE -> target_cpu_type()
  qemu: Introduce target_cpu_type()
  qapi: Rename TargetInfo structure as QemuTargetInfo
  hw/microblaze: Evaluate TARGET_BIG_ENDIAN at compile time
  hw/mips: Evaluate TARGET_BIG_ENDIAN at compile time
  target/xtensa: Evaluate TARGET_BIG_ENDIAN at compile time
  target/mips: Check CPU endianness at runtime using env_is_bigendian()
  accel/kvm: Use target_needs_bswap()
  linux-user/elfload: Use target_needs_bswap()
  target/hexagon: Include missing 'accel/tcg/getpc.h'
  accel/tcg: Correct list of included headers in tcg-stub.c
  system/kvm: make functions accessible from common code
  meson: Use osdep_prefix for strchrnul()
  meson: Share common C source prefixes
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-04-27 12:47:16 -04:00
Philippe Mathieu-Daudé
12d1a768bd qom: Have class_init() take a const data argument
Mechanical change using gsed, then style manually adapted
to pass checkpatch.pl script.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250424194905.82506-4-philmd@linaro.org>
2025-04-25 17:00:41 +02:00
Tomita Moeko
5dbe25e9db vfio/igd: Update IGD passthrough documentation
A previous change made the OpRegion and LPC quirks independent of the
existing legacy mode, update the documentation accordingly. More related
topics, like creating EFI Option ROM of IGD for OVMF, how to solve the
VFIO_DMA_MAP Invalid Argument warning, as well as details on IGD memory
internals, are also added.

Signed-off-by: Tomita Moeko <tomitamoeko@gmail.com>
Reviewed-by: Alex Williamson <alex.williamson@redhat.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250313150339.358621-1-tomitamoeko@gmail.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-04-25 09:01:36 +02:00
Philippe Mathieu-Daudé
a3d40b5eff tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field
Instead of having a compile-time TARGET_SUPPORTS_MTTCG definition,
have each target set the 'mttcg_supported' field in the TCGCPUOps
structure.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250405161320.76854-17-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23 15:07:32 -07:00
Philippe Mathieu-Daudé
8201f1a29c tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally
By directly using TCGCPUOps::guest_default_memory_order,
we don't need the TCG_GUEST_DEFAULT_MO definition anymore.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23 15:07:32 -07:00
Richard Henderson
8be545ba5a include/system: Move exec/memory.h to system/memory.h
Convert the existing includes with

  sed -i ,exec/memory.h,system/memory.h,g

Move the include within cpu-all.h into a !CONFIG_USER_ONLY block.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-23 14:08:21 -07:00
Thomas Huth
52e9ed6d3a Remove the remainders of the Avocado tests
Now that all Avocado tests have been converted to or been replaced by
other functional tests, we can delete the remainders of the Avocado
tests from the QEMU source tree.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20250414113031.151105-16-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-04-23 07:51:25 +02:00
Thomas Huth
5748e46415 docs/devel/testing: Dissolve the ci-definitions.rst.inc file
This file was meant for defining the vocabulary for our testing
efforts, but it did not age well: First, the definitions are not
only about the CI part, but also about testing in general, so most
of the information should rather reside in main.rst instead.
Second, some vocabulary has never been really adopted by the QEMU
project, for example we never really use the word "system testing"
since "system" rather means the system emulator binaries in the
QEMU project (and we also don't do any testing with other components
like libvirt and virt-managers here). It also defines that the qtests
are the "functional" tests in QEMU, which is not really up to date
anymore after the "tests/functional" framework has been introduced
a couple of months ago (FWIW, the qtests could rather be seen as a
mix between unit testing and functional testing).

To solve this problem, move the useful parts of this file into
main.rst and directly into ci.rst, and drop the ones (like "system
testing") that we don't really need anymore.

Message-ID: <20250314085959.1585568-1-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-04-23 07:51:25 +02:00
Thomas Huth
f8c5484417 gitlab-ci: Update QEMU_JOB_AVOCADO and QEMU_CI_AVOCADO_TESTING
Since we don't run the Avocado jobs in the CI anymore, rename
these variables to QEMU_JOB_FUNCTIONAL and QEMU_CI_FUNCTIONAL.

Also, there was a mismatch between the documentation and the
implementation of QEMU_CI_AVOCADO_TESTING: While the documentation
said that you had to "Set this variable to have the tests using the
Avocado framework run automatically", you indeed needed to set it
to make the pipelines appear in your dashboard - but they were never
run automatically in forks and had to be triggered manually. Let's
improve this now: No need to hide these pipelines from the users
by default anymore (the functional tests should be stable enough
nowadays), and rather allow the users to run the pipelines auto-
matically with this switch now instead, as was documented.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20250414113031.151105-15-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-04-23 07:51:25 +02:00
Richard Henderson
f3ca7ca222 docs: Document removal of 64-bit on 32-bit emulation
With acce728cbc we disallowed configuring 64-bit guests on
32-bit hosts, but forgot to document that in removed-features.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2025-04-14 12:30:09 +03:00
Stefan Weil via
22e6d70294 docs: Fix some typos (found by codespell and typos)
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2025-04-13 13:45:04 +03:00
Stefan Hajnoczi
7960e8c8ad Misc HW patches
- Fix overrun when parsing SMBIOS OEM string (Daan)
 - Correctly call handle_machine_dumpdtb() callback (Joel)
 - List HVF as supported for virt machine (Zhang)
 - Correct UFS segment/alloc size comments (Keoseong)
 - Do not expose unimplemented devices in i.MX8mp DTB (Guenter & Bernhard)
 - Attach NVMe private namespaces to proper controller (Klaus)
 - Fix typo in SDPX license checker script (Zhao)
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Merge tag 'hw-misc-20250408' of https://github.com/philmd/qemu into staging

Misc HW patches

- Fix overrun when parsing SMBIOS OEM string (Daan)
- Correctly call handle_machine_dumpdtb() callback (Joel)
- List HVF as supported for virt machine (Zhang)
- Correct UFS segment/alloc size comments (Keoseong)
- Do not expose unimplemented devices in i.MX8mp DTB (Guenter & Bernhard)
- Attach NVMe private namespaces to proper controller (Klaus)
- Fix typo in SDPX license checker script (Zhao)

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* tag 'hw-misc-20250408' of https://github.com/philmd/qemu:
  scripts/checkpatch: Fix typo in SPDX-License-Identifier keyword
  hw/nvme: fix attachment of private namespaces
  hw/arm/imx8mp-evk: Temporarily remove unimplemented imx8mp-fspi node from devicetree
  hw/arm/imx8mp-evk: Remove unimplemented cpu-idle-states properties from devicetree
  hw/ufs: Fix incorrect comment for segment_size and allocation_unit_size
  docs/arm: Add apple HVF host for supported guest CPU type
  hw/core/machine: Fix -machine dumpdtb=file.dtb
  smbios: Fix buffer overrun when using path= option

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-04-09 04:32:46 -04:00
Guenter Roeck
764ca3ec89 hw/arm/imx8mp-evk: Remove unimplemented cpu-idle-states properties from devicetree
The cpu-idle-states property causes a hard boot hang. Rather than documenting
the workaround, perform the removal from the devicetree automatically.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
[Bernhard: split patch, update documentation, adapt commit message]
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <20250405214900.7114-3-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-04-08 20:46:10 +02:00
Zhang Chen
2ba700a501 docs/arm: Add apple HVF host for supported guest CPU type
In my test, latest QEMU already support Apple HVF for -cpu host and max.

From guest VM lscpu:

Architecture:             aarch64
  CPU op-mode(s):         64-bit
  Byte Order:             Little Endian
CPU(s):                   11
  On-line CPU(s) list:    0-10
Vendor ID:                Apple
  Model name:             -
    Model:                0
    Thread(s) per core:   1
    Core(s) per socket:   11
    Socket(s):            1
    Stepping:             0x0
    BogoMIPS:             48.00
    Flags:                fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 asimddp sha512 asim
                          dfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint

Signed-off-by: Zhang Chen <zhangckid@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-ID: <20250401083102.72845-1-zhangckid@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-04-08 20:46:10 +02:00
Markus Armbruster
6d7b3efc3f docs/sphinx/qmp_lexer: Highlight elisions like comments, not prompts
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-ID: <20250404121413.1743790-8-armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
2025-04-08 09:04:34 +02:00