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motorhead/qemu

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mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-04 00:03:54 -06:00

5a3d8c0477 Based R528 files on its closesr sibling, the R40 sunxi_r528_dev Motorhead 2025-07-06 01:55:40 -06:00
083c3108f4 Initial sstup for QEMU emulation of the Allwinner R528 SoC Motorhead 2025-07-05 23:05:46 -06:00
e240f6cc25 Merge tag 'pull-riscv-to-apply-20250704' of https://github.com/alistair23/qemu into staging master staging Stefan Hajnoczi 2025-07-04 08:58:58 -04:00
989dd906ed Merge tag 'accel-20250704' of https://github.com/philmd/qemu into staging Stefan Hajnoczi 2025-07-04 08:58:49 -04:00
563ac3d181 Merge tag 'pull-vfio-20250704' of https://github.com/legoater/qemu into staging Stefan Hajnoczi 2025-07-04 08:58:39 -04:00
a876b05d38 Merge tag 'pull-aspeed-20250704' of https://github.com/legoater/qemu into staging Stefan Hajnoczi 2025-07-04 08:58:27 -04:00
dc8bffc4eb target: riscv: Add Svrsw60t59b extension support Alexandre Ghiti 2025-07-02 07:28:52 +00:00
5625817e8b target/riscv: Add a property to set vill bit on reserved usage of vsetvli instruction Vasilis Liaskovitis 2025-06-18 23:35:42 +02:00
a1f44e0c59 tests/tcg/riscv64: Add test for MEPC bit masking Charalampos Mitrodimas 2025-07-03 18:21:44 +00:00
b3452452e6 target/riscv: Fix MEPC/SEPC bit masking for IALIGN Charalampos Mitrodimas 2025-07-03 18:21:43 +00:00
bc2200134c migration: Fix migration failure when aia is configured as aplic-imsic liu.xuemei1@zte.com.cn 2025-06-16 15:00:34 +08:00
b5092b3db2 target/riscv: rvv: Fix missing exit TB flow for ldff_trans Max Chou 2025-06-27 21:30:13 +08:00
29abd3d112 hw/riscv: Initial support for BOSC's Xiangshan Kunminghu FPGA prototype Huang Borong 2025-06-17 15:42:22 +08:00
60aab7ad11 target/riscv: Add BOSC's Xiangshan Kunminghu CPU Huang Borong 2025-04-25 20:22:12 +08:00
2454fc95ec hw/riscv/virt: Use setprop_sized_cells for pcie Joel Stanley 2025-06-04 12:24:48 +09:30
0e7e0ee639 hw/riscv/virt: Use setprop_sized_cells for iommu Joel Stanley 2025-06-04 12:24:47 +09:30
faa991f678 hw/riscv/virt: Use setprop_sized_cells for rtc Joel Stanley 2025-06-04 12:24:46 +09:30
4f1572d6f1 hw/riscv/virt: Use setprop_sized_cells for uart Joel Stanley 2025-06-04 12:24:45 +09:30
08454fc3f5 hw/riscv/virt: Use setprop_sized_cells for reset Joel Stanley 2025-06-04 12:24:44 +09:30
ad41a7022b hw/riscv/virt: Use setprop_sized_cells for virtio Joel Stanley 2025-06-04 12:24:43 +09:30
507161b5f5 hw/riscv/virt: Use setprop_sized_cells for plic Joel Stanley 2025-06-04 12:24:42 +09:30
dd3d4fd992 hw/riscv/virt: Use setprop_sized_cells for aclint Joel Stanley 2025-06-04 12:24:41 +09:30
4b7b4f9cb4 hw/riscv/virt: Use setprop_sized_cells for aplic Joel Stanley 2025-06-04 12:24:40 +09:30
349500bfb8 hw/riscv/virt: Use setprop_sized_cells for memory Joel Stanley 2025-06-04 12:24:39 +09:30
16adb1f5d7 hw/riscv/virt: Use setprop_sized_cells for clint Joel Stanley 2025-06-04 12:24:38 +09:30
81a245091f hw/riscv/virt: Fix clint base address type Joel Stanley 2025-06-04 12:24:37 +09:30
61240e3a06 hw/char: sifive_uart: Avoid infinite delay of async xmit function Florian Lugou 2025-06-05 12:12:54 +02:00
2b027e73ee target/riscv: Fix fcvt.s.bf16 NaN box checking Anton Blanchard 2025-05-01 11:42:53 +00:00
7ec39d0cc9 target/riscv: use qemu_chr_fe_write_all() in DBCN_CONSOLE_WRITE_BYTE Daniel Henrique Barboza 2025-06-05 06:44:56 -03:00
5000ba0cb1 hw/riscv/riscv-iommu: Fix PPN field of Translation-reponse register Nutty Liu 2025-06-05 20:48:48 +08:00
cd633bea8b target/riscv: Make PMP region count configurable Jay Chang 2025-06-06 15:25:25 +08:00
b0175841fa target/riscv/kvm: add max_satp_mode from host cpu Meng Zhuo 2025-06-06 11:42:51 +08:00
f9eaa1542b target/riscv: support atomic instruction fetch (Ziccif) Jim Shu 2025-05-08 17:48:38 +08:00
5ee4f21713 target/riscv/cpu.c: do better with 'named features' doc Daniel Henrique Barboza 2025-06-04 14:43:29 -03:00
bab2be1923 target/riscv/cpu.c: add 'ssstrict' to riscv, isa Daniel Henrique Barboza 2025-06-04 14:43:28 -03:00
f31ba686a9 target/riscv/cpu.c: add 'sdtrig' in riscv,isa Daniel Henrique Barboza 2025-06-04 14:43:27 -03:00
455c0fa9ee target/riscv: remove capital 'Z' CPU properties Daniel Henrique Barboza 2025-05-30 10:46:08 -03:00
444cffd37b target/riscv: Extend PMP region up to 64 Jay Chang 2025-05-22 16:12:35 +08:00
cab6b5d8c3 target/riscv: add profile->present flag Daniel Henrique Barboza 2025-05-28 15:44:07 -03:00
f655704c3d target/riscv/tcg: decouple profile enablement from user prop Daniel Henrique Barboza 2025-05-28 15:44:06 -03:00
a429f9304d target/riscv/tcg: restrict satp_mode changes in cpu_set_profile Daniel Henrique Barboza 2025-05-28 15:44:05 -03:00
148499b343 target/riscv/cpu.c: fix zama16b order in isa_edata_arr[] Daniel Henrique Barboza 2025-05-22 08:33:44 -03:00
dff5f51540 target/riscv: Enable/Disable S/VS-mode Timer when STCE bit is changed Jim Shu 2025-05-19 22:35:18 +08:00
3cb2edae74 target/riscv: Fix VSTIP bit in sstc extension. Jim Shu 2025-05-19 22:35:17 +08:00
af27fc569a hw/intc: riscv_aclint: Fix mtime write for sstc extension Jim Shu 2025-05-19 22:35:16 +08:00
6eba6fe967 target/riscv: Add the checking into stimecmp write function. Jim Shu 2025-05-19 22:35:15 +08:00
c8beb901be MAINTAINERS: Add me as reviewer of overall accelerators section Philippe Mathieu-Daudé 2025-07-03 19:26:19 +02:00
0fd1d74080 monitor/hmp-cmds-target: add CPU_DUMP_VPU in hmp_info_registers() Daniel Henrique Barboza 2025-06-23 11:53:06 -03:00
842e7eecd4 accel: Pass AccelState argument to gdbstub_supported_sstep_flags() Philippe Mathieu-Daudé 2025-06-20 10:59:21 +02:00
1e9fb43d30 accel: Remove unused MachineState argument of AccelClass::setup_post() Philippe Mathieu-Daudé 2025-06-30 15:33:25 +02:00
8dd5e6befc accel: Directly pass AccelState argument to AccelClass::has_memory() Philippe Mathieu-Daudé 2025-06-30 15:28:08 +02:00
583d1c8f16 accel/kvm: Directly pass KVMState argument to do_kvm_create_vm() Philippe Mathieu-Daudé 2025-06-30 15:30:24 +02:00
f0db25adcf accel/kvm: Prefer local AccelState over global MachineState::accel Philippe Mathieu-Daudé 2025-06-06 12:26:18 +02:00
0fdcfc3baf accel/tcg: Prefer local AccelState over global current_accel() Philippe Mathieu-Daudé 2025-06-06 12:29:17 +02:00
51e1896199 accel: Propagate AccelState to AccelClass::init_machine() Philippe Mathieu-Daudé 2025-06-06 12:24:41 +02:00
38623a9f63 accel: Keep reference to AccelOpsClass in AccelClass Philippe Mathieu-Daudé 2025-06-06 12:07:47 +02:00
b9b8ce0384 accel: Expose and register generic_handle_interrupt() Philippe Mathieu-Daudé 2025-06-12 14:45:19 +02:00
e8388158e6 accel/dummy: Extract 'dummy-cpus.h' header from 'system/cpus.h' Philippe Mathieu-Daudé 2025-06-30 16:20:10 +02:00
d5a407a576 accel/whpx: Expose whpx_enabled() to common code Philippe Mathieu-Daudé 2025-06-16 10:40:00 +02:00
b6637bd556 accel/nvmm: Expose nvmm_enabled() to common code Philippe Mathieu-Daudé 2025-06-16 10:39:09 +02:00
60c9cec12c accel/system: Document cpu_synchronize_state_post_init/reset() Philippe Mathieu-Daudé 2025-06-16 16:09:23 +02:00
1f8b0b6473 accel/system: Document cpu_synchronize_state() Philippe Mathieu-Daudé 2025-06-16 16:09:08 +02:00
476e737965 accel/kvm: Remove kvm_cpu_synchronize_state() stub Philippe Mathieu-Daudé 2025-06-16 14:13:20 +02:00
2974171205 accel/whpx: Replace @dirty field by generic CPUState::vcpu_dirty field Philippe Mathieu-Daudé 2025-06-17 06:59:29 +02:00
2098164a6b accel/nvmm: Replace @dirty field by generic CPUState::vcpu_dirty field Philippe Mathieu-Daudé 2025-06-17 06:59:03 +02:00
93bbbcb8d6 accel/hvf: Replace @dirty field by generic CPUState::vcpu_dirty field Philippe Mathieu-Daudé 2025-06-17 06:54:32 +02:00
332ad068a0 cpus: Document CPUState::vcpu_dirty field Philippe Mathieu-Daudé 2025-06-17 06:47:28 +02:00
5da232017a accel/hvf: Move generic method declarations to hvf-all.c Philippe Mathieu-Daudé 2025-07-01 14:57:25 +02:00
c4b231cbd3 accel/hvf: Move per-cpu method declarations to hvf-accel-ops.c Philippe Mathieu-Daudé 2025-06-30 11:33:53 +02:00
0175310c38 accel/hvf: Restrict internal declarations Philippe Mathieu-Daudé 2025-06-30 11:17:43 +02:00
a472390e80 accel/tcg: Factor tcg_dump_stats() out for re-use Philippe Mathieu-Daudé 2025-07-03 12:16:27 +02:00
04fbbeb765 accel/tcg: Factor tcg_dump_flush_info() out Philippe Mathieu-Daudé 2025-06-17 11:48:44 +02:00
f1e59f012d accel/tcg: Remove profiler leftover Philippe Mathieu-Daudé 2025-07-03 11:42:17 +02:00
a8e49597d4 accel/tcg: Remove 'info opcount' and @x-query-opcount Philippe Mathieu-Daudé 2025-07-03 11:42:43 +02:00
06810394fd accel/kvm: Reduce kvm_create_vcpu() declaration scope Philippe Mathieu-Daudé 2025-06-17 07:02:17 +02:00
f3fc87a14b accel/kvm: Remove kvm_init_cpu_signals() stub Philippe Mathieu-Daudé 2025-06-16 14:15:52 +02:00
d30245d3f5 system/cpus: Assert interrupt handling is done with BQL locked Philippe Mathieu-Daudé 2025-06-19 07:56:13 +02:00
3a34dad2c0 tests/functional: Add gb200 tests Ed Tanous 2025-07-03 07:42:49 -07:00
becfaa10a2 hw/arm/aspeed: Add GB200 BMC target Ed Tanous 2025-07-03 07:42:48 -07:00
ad8e0e8a00 docs: add support for gb200-bmc Ed Tanous 2025-07-03 07:42:47 -07:00
92096685a0 hw/arm/aspeed: Add second SPI chip to Aspeed model Ed Tanous 2025-07-03 07:42:46 -07:00
6888a4a9c8 aspeed: Deprecate the ast2700a0-evb machine Jamin Lin 2025-07-03 13:24:00 +08:00
7437caad20 vfio: doc changes for cpr Steve Sistare 2025-07-02 14:58:58 -07:00
99cedd5d55 vfio/container: delete old cpr register Steve Sistare 2025-07-02 14:58:57 -07:00
6ff4cccd13 iommufd: preserve DMA mappings Steve Sistare 2025-07-02 14:58:56 -07:00
5c066c4be2 vfio/iommufd: change process Steve Sistare 2025-07-02 14:58:55 -07:00
010643eeb1 vfio/iommufd: reconstruct hwpt Steve Sistare 2025-07-02 14:58:54 -07:00
4296ee0745 vfio/iommufd: reconstruct device Steve Sistare 2025-07-02 14:58:53 -07:00
2a3f0a59bd vfio/iommufd: preserve descriptors Steve Sistare 2025-07-02 14:58:52 -07:00
f2f3e4667e vfio/iommufd: cpr state Steve Sistare 2025-07-02 14:58:51 -07:00
a6f2f9c42f migration: vfio cpr state hook Steve Sistare 2025-07-02 14:58:50 -07:00
06c6a65852 vfio/iommufd: register container for cpr Steve Sistare 2025-07-02 14:58:49 -07:00
a434fd8f64 vfio/iommufd: device name blocker Steve Sistare 2025-07-02 14:58:48 -07:00
184053f04f vfio/iommufd: add vfio_device_free_name Steve Sistare 2025-07-02 14:58:47 -07:00
b9b389b9e0 vfio/iommufd: invariant device name Steve Sistare 2025-07-02 14:58:46 -07:00
fb32965b6d vfio/iommufd: use IOMMU_IOAS_MAP_FILE Steve Sistare 2025-07-02 14:58:45 -07:00
d7ae4a740c physmem: qemu_ram_get_fd_offset Steve Sistare 2025-07-02 14:58:44 -07:00
ab48cedc64 backends/iommufd: change process ioctl Steve Sistare 2025-07-02 14:58:43 -07:00
e563dc88c2 backends/iommufd: iommufd_backend_map_file_dma Steve Sistare 2025-07-02 14:58:42 -07:00
ccfc6715cf migration: cpr_get_fd_param helper Steve Sistare 2025-07-02 14:58:41 -07:00