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hw/arm/aspeed: Add second SPI chip to Aspeed model

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Aspeed2600 has two spi lanes;  Add a new struct that can mount the
second SPI.

Signed-off-by: Ed Tanous <etanous@nvidia.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250703144249.3348879-2-etanous@nvidia.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
This commit is contained in:
Ed Tanous 2025-07-03 07:42:46 -07:00 • committed by Cédric Le Goater
parent 6888a4a9c8
commit 92096685a0
2 changed files with 4 additions and 0 deletions
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2
hw/arm/aspeed.c
View file

@ -465,6 +465,8 @@ static void aspeed_machine_init(MachineState *machine)
aspeed_board_init_flashes(&bmc->soc->spi[0],
bmc->spi_model ? bmc->spi_model : amc->spi_model,
1, amc->num_cs);
aspeed_board_init_flashes(&bmc->soc->spi[1],
amc->spi2_model, 1, amc->num_cs2);
}
if (machine->kernel_filename && sc->num_cpus > 1) {

2
include/hw/arm/aspeed.h
View file

@ -35,7 +35,9 @@ struct AspeedMachineClass {
uint32_t hw_strap2;
const char *fmc_model;
const char *spi_model;
const char *spi2_model;
uint32_t num_cs;
uint32_t num_cs2;
uint32_t macs_mask;
void (*i2c_init)(AspeedMachineState *bmc);
uint32_t uart_default;