Commit graph

17496 commits

Author SHA1 Message Date
Richard Henderson
c96447d838 tcg: Merge INDEX_op_ctz_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
5a5bb0a5a0 tcg: Merge INDEX_op_clz_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
005a87e148 tcg: Merge INDEX_op_rot{l,r}_{i32,i64}
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
3949f365eb tcg: Merge INDEX_op_sar_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
74dbd36f1f tcg: Merge INDEX_op_shr_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
6ca594517a tcg: Merge INDEX_op_shl_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
cd9acd2049 tcg: Merge INDEX_op_remu_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
9a6bc1840e tcg: Merge INDEX_op_rem_{i32,i64}
Rename to INDEX_op_rems to emphasize signed inputs,
and mirroring INDEX_op_remu_*.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
8109598b68 tcg: Merge INDEX_op_divu2_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
ee1805b9e6 tcg: Merge INDEX_op_div2_{i32,i64}
Rename to INDEX_op_divs2 to emphasize signed inputs,
and mirroring INDEX_op_divu2_*.  Document the opcode.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
961b80aecd tcg: Merge INDEX_op_divu_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
b2c514f9d5 tcg: Merge INDEX_op_div_{i32,i64}
Rename to INDEX_op_divs to emphasize signed inputs,
and mirroring INDEX_op_divu_*.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
c742824dd8 tcg: Merge INDEX_op_mulsh_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
aa28c9ef8e tcg: Merge INDEX_op_muluh_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
d2c3ecadea tcg: Merge INDEX_op_mul_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
5c62d3779b tcg: Merge INDEX_op_not_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
6971358747 tcg: Merge INDEX_op_neg_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
60f34f55f1 tcg: Merge INDEX_op_sub_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
3a8c4e9e53 tcg: Merge INDEX_op_nor_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:16 -07:00
Richard Henderson
59379a45af tcg: Merge INDEX_op_nand_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Richard Henderson
5c0968a7e1 tcg: Merge INDEX_op_eqv_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Richard Henderson
fffd3dc902 tcg: Merge INDEX_op_xor_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Richard Henderson
6aba25ebb9 tcg: Merge INDEX_op_orc_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Richard Henderson
49bd751497 tcg: Merge INDEX_op_or_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Richard Henderson
46f96bff16 tcg: Merge INDEX_op_andc_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Richard Henderson
c3b920b3d6 tcg: Merge INDEX_op_and_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Richard Henderson
79602f632a tcg: Merge INDEX_op_add_{i32,i64}
Rely on TCGOP_TYPE instead of opcodes specific to each type.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Richard Henderson
b5701261da tcg: Merge INDEX_op_mov_{i32,i64}
Begin to rely on TCGOp.type to discriminate operations,
rather than two different opcodes.  Convert mov first.
Introduce TCG_OPF_INT in order to keep opcode dumps the same.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Richard Henderson
48e8de684a tcg: Remove INDEX_op_ext{8,16,32}*
Use the fully general extract opcodes instead.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:15 -07:00
Stefan Hajnoczi
73d29ea241 Block layer patches
- Discard alignment fixes
 - Remove unused callback .bdrv_aio_pdiscard()
 - qemu-img bench: Input validation fix
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Merge tag 'for-upstream' of https://repo.or.cz/qemu/kevin into staging

Block layer patches

- Discard alignment fixes
- Remove unused callback .bdrv_aio_pdiscard()
- qemu-img bench: Input validation fix

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* tag 'for-upstream' of https://repo.or.cz/qemu/kevin:
  qemu-img: improve queue depth validation in img_bench
  block: Remove unused callback function *bdrv_aio_pdiscard
  block/io: skip head/tail requests on EINVAL
  file-posix: probe discard alignment on Linux block devices

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-04-27 12:47:23 -04:00
Stefan Hajnoczi
06b40d250e Various patches loosely related to single binary work:
- Replace cpu_list() definition by CPUClass::list_cpus() callback
 - Remove few MO_TE definitions on Hexagon / X86 targets
 - Remove target_ulong uses in  ARMMMUFaultInfo and ARM CPUWatchpoint
 - Remove DEVICE_HOST_ENDIAN definition
 - Evaluate TARGET_BIG_ENDIAN at compile time and use target_needs_bswap() more
 - Rename target_words_bigendian() as target_big_endian()
 - Convert target_name() and target_cpu_type() to TargetInfo API
 - Constify QOM TypeInfo class_data/interfaces fields
 - Get default_cpu_type calling machine_class_default_cpu_type()
 - Correct various uses of GLibCompareDataFunc prototype
 - Simplify ARM/Aarch64 gdb_get_core_xml_file() handling a bit
 - Move device tree files in their own pc-bios/dtb/ subdir
 - Correctly check strchrnul() symbol availability on macOS SDK
 - Move target-agnostic methods out of cpu-target.c and accel-target.c
 - Unmap canceled USB XHCI packet
 - Use deposit/extract API in designware model
 - Fix MIPS16e translation
 - Few missing header fixes
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Merge tag 'single-binary-20250425' of https://github.com/philmd/qemu into staging

Various patches loosely related to single binary work:

- Replace cpu_list() definition by CPUClass::list_cpus() callback
- Remove few MO_TE definitions on Hexagon / X86 targets
- Remove target_ulong uses in  ARMMMUFaultInfo and ARM CPUWatchpoint
- Remove DEVICE_HOST_ENDIAN definition
- Evaluate TARGET_BIG_ENDIAN at compile time and use target_needs_bswap() more
- Rename target_words_bigendian() as target_big_endian()
- Convert target_name() and target_cpu_type() to TargetInfo API
- Constify QOM TypeInfo class_data/interfaces fields
- Get default_cpu_type calling machine_class_default_cpu_type()
- Correct various uses of GLibCompareDataFunc prototype
- Simplify ARM/Aarch64 gdb_get_core_xml_file() handling a bit
- Move device tree files in their own pc-bios/dtb/ subdir
- Correctly check strchrnul() symbol availability on macOS SDK
- Move target-agnostic methods out of cpu-target.c and accel-target.c
- Unmap canceled USB XHCI packet
- Use deposit/extract API in designware model
- Fix MIPS16e translation
- Few missing header fixes

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# gpg: Signature made Fri 25 Apr 2025 11:26:55 EDT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'single-binary-20250425' of https://github.com/philmd/qemu: (58 commits)
  qemu: Convert target_name() to TargetInfo API
  accel: Move target-agnostic code from accel-target.c -> accel-common.c
  accel: Make AccelCPUClass structure target-agnostic
  accel: Include missing 'qemu/accel.h' header in accel-internal.h
  accel: Implement accel_init_ops_interfaces() for both system/user mode
  cpus: Move target-agnostic methods out of cpu-target.c
  cpus: Replace CPU_RESOLVING_TYPE -> target_cpu_type()
  qemu: Introduce target_cpu_type()
  qapi: Rename TargetInfo structure as QemuTargetInfo
  hw/microblaze: Evaluate TARGET_BIG_ENDIAN at compile time
  hw/mips: Evaluate TARGET_BIG_ENDIAN at compile time
  target/xtensa: Evaluate TARGET_BIG_ENDIAN at compile time
  target/mips: Check CPU endianness at runtime using env_is_bigendian()
  accel/kvm: Use target_needs_bswap()
  linux-user/elfload: Use target_needs_bswap()
  target/hexagon: Include missing 'accel/tcg/getpc.h'
  accel/tcg: Correct list of included headers in tcg-stub.c
  system/kvm: make functions accessible from common code
  meson: Use osdep_prefix for strchrnul()
  meson: Share common C source prefixes
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-04-27 12:47:16 -04:00
Philippe Mathieu-Daudé
3d881164d4 qemu: Convert target_name() to TargetInfo API
Have target_name() be a target-agnostic method, dispatching
to a per-target TargetInfo singleton structure.
By default a stub singleton is used. No logical change
expected.

Inspired-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250424222112.36194-3-philmd@linaro.org>
2025-04-25 17:09:58 +02:00
Philippe Mathieu-Daudé
44246e7170 accel: Make AccelCPUClass structure target-agnostic
Move the target-agnostic parts of "accel/accel-cpu-target.h"
to "accel/accel-cpu.h".

Doing so we need to include missing "hw/core/cpu.h" header
in "accel/accel-cpu.h" otherwise we get:

  include/accel/accel-cpu-target.h:39:28: error: unknown type name 'CPUClass'
     39 |     void (*cpu_class_init)(CPUClass *cc);
        |                            ^

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250417165430.58213-7-philmd@linaro.org>
2025-04-25 17:09:58 +02:00
Philippe Mathieu-Daudé
2b7ae6e0f6 qemu: Introduce target_cpu_type()
Introduce the target_cpu_type() helper to access the
CPU_RESOLVING_TYPE target-specific definition from
target-agnostic code.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250417165430.58213-2-philmd@linaro.org>
2025-04-25 17:09:58 +02:00
Pierrick Bouvier
2ef9faf037 system/kvm: make functions accessible from common code
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250424232829.141163-8-pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-04-25 17:09:58 +02:00
BALATON Zoltan
fcb1ad456c system/datadir: Add new type constant for DTB files
Currently DTB files are mixed with ROMs under BIOS type. Separate them
under a new type constant and turn defines into an enum while at it.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <ae793d1f81e3577605759c43871722324a1ef2cb.1745402140.git.balaton@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-04-25 17:09:58 +02:00
Philippe Mathieu-Daudé
8af0e52b28 system/memory: Remove DEVICE_HOST_ENDIAN definition
Since the previous commit ("exec/memory.h: make devend_memop
"target defines" agnostic") there is a single use of the
DEVICE_HOST_ENDIAN definition in ram_device_mem_ops: inline
it and remove its definition altogether.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250423111625.10424-1-philmd@linaro.org>
2025-04-25 17:09:58 +02:00
Sunny Zhu
ed1aef1716 block: Remove unused callback function *bdrv_aio_pdiscard
The bytes type in *bdrv_aio_pdiscard should be int64_t rather than int.

There are no drivers implementing the *bdrv_aio_pdiscard() callback,
it appears to be an unused function. Therefore, we'll simply remove it
instead of fixing it.

Additionally, coroutine-based callbacks are preferred. If someone needs
to implement bdrv_aio_pdiscard, a coroutine-based version would be
straightforward to implement.

Signed-off-by: Sunny Zhu <sunnyzhyy@qq.com>
Message-ID: <tencent_7140D2E54157D98CF3D9E64B1A007A1A7906@qq.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2025-04-25 17:06:50 +02:00
Philippe Mathieu-Daudé
b939b8e42a exec: Rename target_words_bigendian() -> target_big_endian()
In commit 98ed8ecfc9 ("exec: introduce target_words_bigendian()
helper") target_words_bigendian() was matching the definition it
was depending on (TARGET_WORDS_BIGENDIAN). Later in commit
ee3eb3a7ce ("Replace TARGET_WORDS_BIGENDIAN") the definition was
renamed as TARGET_BIG_ENDIAN but we didn't update the helper.
Do it now mechanically using:

  $ sed -i -e s/target_words_bigendian/target_big_endian/g \
        $(git grep -wl target_words_bigendian)

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-Id: <20250417210025.68322-1-philmd@linaro.org>
2025-04-25 17:00:42 +02:00
Peter Maydell
a1f728ecc9 gdbstub: Allow gdb_core_xml_file to be set at runtime
Currently the CPUClass:gdb_core_xml_file setting is a simple 'const
char *' which the CPU class must set to a fixed string.  Allow the
CPU class to instead set a new method gdb_get_core_xml_file() which
returns this string.

This will allow Arm CPUs to use different XML files for AArch32 vs
AArch64 without having to have an extra AArch64-specific class type
purely to give somewhere to set cc->gdb_core_xml_file differently.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250317142819.900029-3-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-04-25 17:00:41 +02:00
Peter Maydell
56a9f0d4c4 hw/core/cpu: gdb_arch_name string should not be freed
The documentation for the CPUClass::gdb_arch_name method claims that
the returned string should be freed with g_free().  This is not
correct: in commit a650683871 we changed this method to
instead return a simple constant string, but forgot to update
the documentation.

Make the documentation match the new semantics.

Fixes: a650683871 ("hw/core/cpu: Return static value with gdb_arch_name()")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250317142819.900029-2-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-04-25 17:00:41 +02:00
Philippe Mathieu-Daudé
2cd09e47aa qom: Make InterfaceInfo[] uses const
Mechanical change using:

  $ sed -i -E 's/\(InterfaceInfo.?\[/\(const InterfaceInfo\[/g' \
              $(git grep -lE '\(InterfaceInfo.?\[\]\)')

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250424194905.82506-7-philmd@linaro.org>
2025-04-25 17:00:41 +02:00
Philippe Mathieu-Daudé
231bf6dda1 qom: Constify TypeInfo::interfaces
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250424194905.82506-6-philmd@linaro.org>
2025-04-25 17:00:41 +02:00
Philippe Mathieu-Daudé
b282b859cf qom: Constify TypeInfo::class_data
All callers now correctly expect a const class data.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250424194905.82506-5-philmd@linaro.org>
2025-04-25 17:00:41 +02:00
Philippe Mathieu-Daudé
12d1a768bd qom: Have class_init() take a const data argument
Mechanical change using gsed, then style manually adapted
to pass checkpatch.pl script.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250424194905.82506-4-philmd@linaro.org>
2025-04-25 17:00:41 +02:00
Philippe Mathieu-Daudé
f1fa787b92 qom: Have class_base_init() take a const data argument
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250424194905.82506-3-philmd@linaro.org>
2025-04-25 17:00:41 +02:00
Philippe Mathieu-Daudé
0a5692fecc cpus: Introduce CPUClass::list_cpus() callback
Some targets define cpu_list to a method listing their
CPUs on stdout. In order to make list_cpus() generic,
introduce the CPUClass::list_cpus() callback.
When no callback is registered, list_cpus() defaults
to the cpu_list definition.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250324185837.46506-2-philmd@linaro.org>
2025-04-25 12:59:09 +02:00
Zhenzhong Duan
fdd7596783 vfio: Remove hiod_typename property
Because we handle host IOMMU device creation in each container backend,
we know which type name to use, so hiod_typename property is useless
now, just remove it.

Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250423072824.3647952-6-zhenzhong.duan@intel.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-04-25 09:01:38 +02:00
Zhenzhong Duan
0805f829a1 vfio: Cleanup host IOMMU device creation
realize() is now moved after attachment, do the same for hiod creation.
Introduce a new function vfio_device_hiod_create_and_realize() to do
them all in one go.

Suggested-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250423072824.3647952-5-zhenzhong.duan@intel.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-04-25 09:01:38 +02:00
Cédric Le Goater
e218ccf0c9 vfio: Rename VFIODevice related services
Rename these routines :

  vfio_disable_irqindex       -> vfio_device_irq_disable
  vfio_unmask_single_irqindex -> vfio_device_irq_unmask
  vfio_mask_single_irqindex   -> vfio_device_irq_mask
  vfio_set_irq_signaling      -> vfio_device_irq_set_signaling
  vfio_attach_device          -> vfio_device_attach
  vfio_detach_device          -> vfio_device_detach
  vfio_get_region_info        -> vfio_device_get_region_info
  vfio_get_dev_region_info    -> vfio_device_get_region_info_type
  vfio_has_region_cap         -> vfio_device_has_region_cap
  vfio_reset_handler          -> vfio_device_reset_hander

to better reflect the namespace they belong to.

Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Link: https://lore.kernel.org/qemu-devel/20250326075122.1299361-37-clg@redhat.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-04-25 09:01:37 +02:00