qemu/target
Peter Maydell a261d3e331 fpu: Make floatx80 invalid encoding settable at runtime
Because floatx80 has an explicit integer bit, this permits some
odd encodings where the integer bit is not set correctly for the
floating point value type. In In Intel terminology the
 categories are:
  exp == 0, int = 0, mantissa == 0 : zeroes
  exp == 0, int = 0, mantissa != 0 : denormals
  exp == 0, int = 1 : pseudo-denormals
  0 < exp < 0x7fff, int = 0 : unnormals
  0 < exp < 0x7fff, int = 1 : normals
  exp == 0x7fff, int = 0, mantissa == 0 : pseudo-infinities
  exp == 0x7fff, int = 1, mantissa == 0 : infinities
  exp == 0x7fff, int = 0, mantissa != 0 : pseudo-NaNs
  exp == 0x7fff, int = 1, mantissa == 0 : NaNs

The usual IEEE cases of zero, denormal, normal, inf and NaN are always valid.
x87 permits as input also pseudo-denormals.
m68k permits all those and also pseudo-infinities, pseudo-NaNs and unnormals.

Currently we have an ifdef in floatx80_invalid_encoding() to select
the x86 vs m68k behaviour.  Add new floatx80_behaviour flags to
select whether pseudo-NaN and unnormal are valid, and use these
(plus the existing pseudo_inf_valid flag) to decide whether these
encodings are invalid at runtime.

We leave pseudo-denormals as always-valid, since both x86 and m68k
accept them.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250224111524.1101196-8-peter.maydell@linaro.org
Message-id: 20250217125055.160887-6-peter.maydell@linaro.org
2025-02-25 15:32:57 +00:00
..
alpha fpu: allow flushing of output denormals to be after rounding 2025-02-11 16:22:07 +00:00
arm target/arm: Use uint32_t in t32_expandimm_imm() 2025-02-20 14:20:29 +00:00
avr target/*: Remove TARGET_LONG_BITS from cpu-param.h 2025-02-08 12:41:33 -08:00
hexagon target/*: Remove TARGET_LONG_BITS from cpu-param.h 2025-02-08 12:41:33 -08:00
hppa fpu: allow flushing of output denormals to be after rounding 2025-02-11 16:22:07 +00:00
i386 fpu: Pass float_status to floatx80_invalid_encoding() 2025-02-25 15:32:57 +00:00
loongarch target/loongarch: Use VADDR_PRIx for logging pc_next 2025-02-18 08:28:54 -08:00
m68k fpu: Make floatx80 invalid encoding settable at runtime 2025-02-25 15:32:57 +00:00
microblaze target/*: Remove TARGET_LONG_BITS from cpu-param.h 2025-02-08 12:41:33 -08:00
mips target/mips: Use VADDR_PRIx for logging pc_next 2025-02-18 08:29:02 -08:00
openrisc target/*: Remove TARGET_LONG_BITS from cpu-param.h 2025-02-08 12:41:33 -08:00
ppc fpu: allow flushing of output denormals to be after rounding 2025-02-11 16:22:07 +00:00
riscv tcg: Remove TCG_OVERSIZED_GUEST 2025-02-18 07:33:42 -08:00
rx fpu: allow flushing of output denormals to be after rounding 2025-02-11 16:22:07 +00:00
s390x QAPI patches patches for 2025-02-10 2025-02-10 10:47:31 -05:00
sh4 fpu: allow flushing of output denormals to be after rounding 2025-02-11 16:22:07 +00:00
sparc target/sparc: fake UltraSPARC T1 PCR and PIC registers 2025-02-18 08:29:03 -08:00
tricore fpu: allow flushing of output denormals to be after rounding 2025-02-11 16:22:07 +00:00
xtensa target/*: Remove TARGET_LONG_BITS from cpu-param.h 2025-02-08 12:41:33 -08:00
Kconfig target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00
meson.build target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00