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target/*: Remove TARGET_LONG_BITS from cpu-param.h

Browse source 
This is now handled by the configs/targets/*.mak fragment.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2025-01-31 09:53:57 -08:00
parent 537600df61
commit 175646f641
19 changed files with 0 additions and 31 deletions
Download patch file Download diff file Expand all files Collapse all files

2
target/alpha/cpu-param.h
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@ -8,8 +8,6 @@
#ifndef ALPHA_CPU_PARAM_H
#define ALPHA_CPU_PARAM_H
#define TARGET_LONG_BITS 64
/* ??? EV4 has 34 phys addr bits, EV5 has 40, EV6 has 44. */
#define TARGET_PHYS_ADDR_SPACE_BITS 44

2
target/arm/cpu-param.h
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@ -9,11 +9,9 @@
#define ARM_CPU_PARAM_H
#ifdef TARGET_AARCH64
# define TARGET_LONG_BITS 64
# define TARGET_PHYS_ADDR_SPACE_BITS 52
# define TARGET_VIRT_ADDR_SPACE_BITS 52
#else
# define TARGET_LONG_BITS 32
# define TARGET_PHYS_ADDR_SPACE_BITS 40
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif

1
target/avr/cpu-param.h
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@ -21,7 +21,6 @@
#ifndef AVR_CPU_PARAM_H
#define AVR_CPU_PARAM_H
#define TARGET_LONG_BITS 32
/*
* TARGET_PAGE_BITS cannot be more than 8 bits because
* 1. all IO registers occupy [0x0000 .. 0x00ff] address range, and they

1
target/hexagon/cpu-param.h
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@ -19,7 +19,6 @@
#define HEXAGON_CPU_PARAM_H
#define TARGET_PAGE_BITS 16 /* 64K pages */
#define TARGET_LONG_BITS 32
#define TARGET_PHYS_ADDR_SPACE_BITS 36
#define TARGET_VIRT_ADDR_SPACE_BITS 32

2
target/hppa/cpu-param.h
View file

@ -8,8 +8,6 @@
#ifndef HPPA_CPU_PARAM_H
#define HPPA_CPU_PARAM_H
#define TARGET_LONG_BITS 64
#if defined(CONFIG_USER_ONLY) && defined(TARGET_ABI32)
# define TARGET_PHYS_ADDR_SPACE_BITS 32
# define TARGET_VIRT_ADDR_SPACE_BITS 32

2
target/i386/cpu-param.h
View file

@ -9,7 +9,6 @@
#define I386_CPU_PARAM_H
#ifdef TARGET_X86_64
# define TARGET_LONG_BITS 64
# define TARGET_PHYS_ADDR_SPACE_BITS 52
/*
* ??? This is really 48 bits, sign-extended, but the only thing
@ -18,7 +17,6 @@
*/
# define TARGET_VIRT_ADDR_SPACE_BITS 47
#else
# define TARGET_LONG_BITS 32
# define TARGET_PHYS_ADDR_SPACE_BITS 36
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif

1
target/loongarch/cpu-param.h
View file

@ -8,7 +8,6 @@
#ifndef LOONGARCH_CPU_PARAM_H
#define LOONGARCH_CPU_PARAM_H
#define TARGET_LONG_BITS 64
#define TARGET_PHYS_ADDR_SPACE_BITS 48
#define TARGET_VIRT_ADDR_SPACE_BITS 48

1
target/m68k/cpu-param.h
View file

@ -8,7 +8,6 @@
#ifndef M68K_CPU_PARAM_H
#define M68K_CPU_PARAM_H
#define TARGET_LONG_BITS 32
/*
* Coldfire Linux uses 8k pages
* and m68k linux uses 4k pages

2
target/microblaze/cpu-param.h
View file

@ -17,11 +17,9 @@
* of address space.
*/
#ifdef CONFIG_USER_ONLY
#define TARGET_LONG_BITS 32
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32
#else
#define TARGET_LONG_BITS 64
#define TARGET_PHYS_ADDR_SPACE_BITS 64
#define TARGET_VIRT_ADDR_SPACE_BITS 64
#endif

5
target/mips/cpu-param.h
View file

@ -7,11 +7,6 @@
#ifndef MIPS_CPU_PARAM_H
#define MIPS_CPU_PARAM_H
#ifdef TARGET_MIPS64
# define TARGET_LONG_BITS 64
#else
# define TARGET_LONG_BITS 32
#endif
#ifdef TARGET_ABI_MIPSN64
#define TARGET_PHYS_ADDR_SPACE_BITS 48
#define TARGET_VIRT_ADDR_SPACE_BITS 48

1
target/openrisc/cpu-param.h
View file

@ -8,7 +8,6 @@
#ifndef OPENRISC_CPU_PARAM_H
#define OPENRISC_CPU_PARAM_H
#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 13
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32

2
target/ppc/cpu-param.h
View file

@ -9,7 +9,6 @@
#define PPC_CPU_PARAM_H
#ifdef TARGET_PPC64
# define TARGET_LONG_BITS 64
/*
* Note that the official physical address space bits is 62-M where M
* is implementation dependent. I've not looked up M for the set of
@ -27,7 +26,6 @@
# define TARGET_VIRT_ADDR_SPACE_BITS 64
# endif
#else
# define TARGET_LONG_BITS 32
# define TARGET_PHYS_ADDR_SPACE_BITS 36
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif

2
target/riscv/cpu-param.h
View file

@ -9,11 +9,9 @@
#define RISCV_CPU_PARAM_H
#if defined(TARGET_RISCV64)
# define TARGET_LONG_BITS 64
# define TARGET_PHYS_ADDR_SPACE_BITS 56 /* 44-bit PPN */
# define TARGET_VIRT_ADDR_SPACE_BITS 48 /* sv48 */
#elif defined(TARGET_RISCV32)
# define TARGET_LONG_BITS 32
# define TARGET_PHYS_ADDR_SPACE_BITS 34 /* 22-bit PPN */
# define TARGET_VIRT_ADDR_SPACE_BITS 32 /* sv32 */
#endif

1
target/rx/cpu-param.h
View file

@ -19,7 +19,6 @@
#ifndef RX_CPU_PARAM_H
#define RX_CPU_PARAM_H
#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 12
#define TARGET_PHYS_ADDR_SPACE_BITS 32

1
target/s390x/cpu-param.h
View file

@ -8,7 +8,6 @@
#ifndef S390_CPU_PARAM_H
#define S390_CPU_PARAM_H
#define TARGET_LONG_BITS 64
#define TARGET_PAGE_BITS 12
#define TARGET_PHYS_ADDR_SPACE_BITS 64
#define TARGET_VIRT_ADDR_SPACE_BITS 64

1
target/sh4/cpu-param.h
View file

@ -8,7 +8,6 @@
#ifndef SH4_CPU_PARAM_H
#define SH4_CPU_PARAM_H
#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 12 /* 4k */
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#ifdef CONFIG_USER_ONLY

2
target/sparc/cpu-param.h
View file

@ -8,7 +8,6 @@
#define SPARC_CPU_PARAM_H
#ifdef TARGET_SPARC64
# define TARGET_LONG_BITS 64
# define TARGET_PAGE_BITS 13 /* 8k */
# define TARGET_PHYS_ADDR_SPACE_BITS 41
# ifdef TARGET_ABI32
@ -17,7 +16,6 @@
# define TARGET_VIRT_ADDR_SPACE_BITS 44
# endif
#else
# define TARGET_LONG_BITS 32
# define TARGET_PAGE_BITS 12 /* 4k */
# define TARGET_PHYS_ADDR_SPACE_BITS 36
# define TARGET_VIRT_ADDR_SPACE_BITS 32

1
target/tricore/cpu-param.h
View file

@ -8,7 +8,6 @@
#ifndef TRICORE_CPU_PARAM_H
#define TRICORE_CPU_PARAM_H
#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 14
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#define TARGET_VIRT_ADDR_SPACE_BITS 32

1
target/xtensa/cpu-param.h
View file

@ -8,7 +8,6 @@
#ifndef XTENSA_CPU_PARAM_H
#define XTENSA_CPU_PARAM_H
#define TARGET_LONG_BITS 32
#define TARGET_PAGE_BITS 12
#define TARGET_PHYS_ADDR_SPACE_BITS 32
#ifdef CONFIG_USER_ONLY