qemu/target/avr
Philippe Mathieu-Daudé b8b37affc7 target: Set disassemble_info::endian value for little-endian targets
Have the CPUClass::disas_set_info() callback set the
disassemble_info::endian field for little-endian targets.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250210212931.62401-2-philmd@linaro.org>
2025-03-06 15:46:18 +01:00
..
cpu-param.h target/*: Remove TARGET_LONG_BITS from cpu-param.h 2025-02-08 12:41:33 -08:00
cpu-qom.h target: Move ArchCPUClass definition to 'cpu.h' 2023-11-07 13:08:48 +01:00
cpu.c target: Set disassemble_info::endian value for little-endian targets 2025-03-06 15:46:18 +01:00
cpu.h accel/tcg: Move gen_intermediate_code to TCGCPUOps.translate_core 2024-12-24 08:32:15 -08:00
disas.c meson: target 2020-08-21 06:30:35 -04:00
gdbstub.c target/avr: Use explicit little-endian LD/ST API 2024-10-15 12:13:59 -03:00
helper.c accel/tcg: Rename 'hw/core/tcg-cpu-ops.h' -> 'accel/tcg/cpu-ops.h' 2025-03-06 15:46:17 +01:00
helper.h target/avr: Mark some helpers noreturn 2021-07-09 09:42:28 -07:00
insn.decode target/avr: Add instruction translation - MCU Control Instructions 2020-07-11 11:02:05 +02:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
machine.c target/avr: Constify VMState in machine.c 2023-12-29 11:17:30 +11:00
meson.build meson: Rename target_softmmu_arch -> target_system_arch 2023-10-07 19:03:07 +02:00
translate.c accel/tcg: Move gen_intermediate_code to TCGCPUOps.translate_core 2024-12-24 08:32:15 -08:00