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![]() Interrupt Generation Support (IGS) is a capability that is tied to the interrupt deliver mechanism, not with the core IOMMU emulation. We should allow device implementations to set IGS as they wish. A new helper is added to make it easier for device impls to set IGS. Use it in our existing IOMMU device (riscv-iommu-pci) to set RISCV_IOMMU_CAPS_IGS_MSI. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20241106133407.604587-3-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> |
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.. | ||
boot.c | ||
Kconfig | ||
meson.build | ||
microchip_pfsoc.c | ||
numa.c | ||
opentitan.c | ||
riscv-iommu-bits.h | ||
riscv-iommu-pci.c | ||
riscv-iommu.c | ||
riscv-iommu.h | ||
riscv_hart.c | ||
shakti_c.c | ||
sifive_e.c | ||
sifive_u.c | ||
spike.c | ||
trace-events | ||
trace.h | ||
virt-acpi-build.c | ||
virt.c |