qemu/hw/riscv
Daniel Henrique Barboza d13346d105 hw/riscv/riscv-iommu: parametrize CAP.IGS
Interrupt Generation Support (IGS) is a capability that is tied to the
interrupt deliver mechanism, not with the core IOMMU emulation. We
should allow device implementations to set IGS as they wish.

A new helper is added to make it easier for device impls to set IGS. Use
it in our existing IOMMU device (riscv-iommu-pci) to set
RISCV_IOMMU_CAPS_IGS_MSI.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20241106133407.604587-3-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-12-20 11:19:16 +10:00
..
boot.c target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI 2024-10-30 11:22:07 +10:00
Kconfig hw/riscv: add RISC-V IOMMU base emulation 2024-10-31 13:51:24 +10:00
meson.build hw/riscv: add riscv-iommu-pci reference device 2024-10-31 13:51:24 +10:00
microchip_pfsoc.c hw/riscv: Respect firmware ELF entry point 2024-10-02 15:11:51 +10:00
numa.c hw/riscv/numa.c: use g_autofree in socket_fdt_write_distance_matrix() 2024-02-09 20:43:14 +10:00
opentitan.c hw/riscv: Constify all Property 2024-12-15 12:56:03 -06:00
riscv-iommu-bits.h hw/riscv/riscv-iommu: parametrize CAP.IGS 2024-12-20 11:19:16 +10:00
riscv-iommu-pci.c hw/riscv/riscv-iommu: parametrize CAP.IGS 2024-12-20 11:19:16 +10:00
riscv-iommu.c hw/riscv/riscv-iommu: parametrize CAP.IGS 2024-12-20 11:19:16 +10:00
riscv-iommu.h hw/riscv/riscv-iommu: parametrize CAP.IGS 2024-12-20 11:19:16 +10:00
riscv_hart.c hw/riscv: Constify all Property 2024-12-15 12:56:03 -06:00
shakti_c.c hw/riscv: Respect firmware ELF entry point 2024-10-02 15:11:51 +10:00
sifive_e.c hw: Remove unused inclusion of hw/char/serial.h 2024-10-03 19:33:23 +02:00
sifive_u.c hw/riscv: Constify all Property 2024-12-15 12:56:03 -06:00
spike.c hw/riscv: Respect firmware ELF entry point 2024-10-02 15:11:51 +10:00
trace-events hw/riscv/riscv-iommu: add ATS support 2024-10-31 13:51:24 +10:00
trace.h hw/riscv: add RISC-V IOMMU base emulation 2024-10-31 13:51:24 +10:00
virt-acpi-build.c hw/riscv/virt-acpi-build.c: Update the HID of RISC-V UART 2024-07-22 20:15:42 -04:00
virt.c hw/riscv/virt: Remove pointless GPEX_HOST() cast 2024-12-13 15:27:08 +01:00