Richard Henderson 9f8bb7edac target/avr: Improve decode of LDS, STS ... The comment about not being able to define a field with zero bits is out of date since 94597b6146 ("decodetree: Allow !function with no input bits"). This fixes the missing load of imm in the disassembler. Cc: qemu-stable@nongnu.org Fixes: 9d8caa67a2 ("target/avr: Add support for disassembling via option '-d in_asm'") Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> (cherry picked from commit 6b661b7ed7) Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>		2025-04-24 11:16:03 +03:00
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cpu-param.h	target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h'	2024-04-26 15:31:37 +02:00
cpu-qom.h	target: Move ArchCPUClass definition to 'cpu.h'	2023-11-07 13:08:48 +01:00
cpu.c	target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation	2024-07-11 11:41:34 +01:00
cpu.h	target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h'	2024-04-26 15:31:37 +02:00
disas.c	target/avr: Fix buffer read in avr_print_insn	2025-04-05 16:47:01 +03:00
gdbstub.c	target/avr: Use explicit little-endian LD/ST API	2024-10-15 12:13:59 -03:00
helper.c	exec/cpu: Extract page-protection definitions to page-protection.h	2024-05-06 11:17:15 +02:00
helper.h	target/avr: Mark some helpers noreturn	2021-07-09 09:42:28 -07:00
insn.decode	target/avr: Improve decode of LDS, STS	2025-04-24 11:16:03 +03:00
Kconfig	meson: Introduce target-specific Kconfig	2021-07-09 18:21:34 +02:00
machine.c	target/avr: Constify VMState in machine.c	2023-12-29 11:17:30 +11:00
meson.build	meson: Rename target_softmmu_arch -> target_system_arch	2023-10-07 19:03:07 +02:00
translate.c	target/avr: Improve decode of LDS, STS	2025-04-24 11:16:03 +03:00