qemu/tcg/mips
Richard Henderson aae2456ac0 tcg: Merge INDEX_op_{ld,st}_{i32,i64,i128}
Merge into INDEX_op_{ld,st,ld2,st2}, where "2" indicates that two
inputs or outputs are required. This simplifies the processing of
i64/i128 depending on host word size.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:17 -07:00
..
tcg-target-con-set.h tcg/mips: Drop support for add2/sub2 2025-04-28 13:40:17 -07:00
tcg-target-con-str.h tcg/mips: Drop support for add2/sub2 2025-04-28 13:40:17 -07:00
tcg-target-has.h tcg: Remove INDEX_op_qemu_st8_* 2025-04-28 13:40:17 -07:00
tcg-target-mo.h tcg: Split out tcg-target-mo.h 2025-01-16 20:57:16 -08:00
tcg-target-opc.h.inc tcg: Rename tcg-target.opc.h to tcg-target-opc.h.inc 2025-01-16 20:57:16 -08:00
tcg-target-reg-bits.h tcg: Split out tcg-target-reg-bits.h 2023-06-05 12:04:28 -07:00
tcg-target.c.inc tcg: Merge INDEX_op_{ld,st}_{i32,i64,i128} 2025-04-28 13:40:17 -07:00
tcg-target.h tcg: Introduce the 'z' constraint for a hardware zero register 2025-02-18 08:29:03 -08:00