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qemu/target/xtensa
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Max Filippov 9e03ade441 target/xtensa: implement MEMCTL SR 
MEMCTL SR controls zero overhead loop buffer and number of ways enabled
in L1 caches.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-01-15 13:01:56 -08:00
..
core-dc232b Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
core-dc233c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
core-fsf Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
core-dc232b.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
core-dc233c.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
core-fsf.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
cpu-qom.h Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
cpu.c target/xtensa: implement MEMCTL SR 2017-01-15 13:01:56 -08:00
cpu.h target/xtensa: implement MEMCTL SR 2017-01-15 13:01:56 -08:00
gdbstub.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
helper.c target/xtensa: implement RUNSTALL 2017-01-15 13:01:55 -08:00
helper.h target/xtensa: implement MEMCTL SR 2017-01-15 13:01:56 -08:00
import_core.sh Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
Makefile.objs Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
monitor.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
op_helper.c target/xtensa: implement MEMCTL SR 2017-01-15 13:01:56 -08:00
overlay_tool.h target/xtensa: implement MEMCTL SR 2017-01-15 13:01:56 -08:00
translate.c target/xtensa: implement MEMCTL SR 2017-01-15 13:01:56 -08:00
xtensa-semi.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00