qemu/target/riscv/tcg
Richard Henderson e4a8e093dc accel/tcg: Move gen_intermediate_code to TCGCPUOps.translate_core
Convert all targets simultaneously, as the gen_intermediate_code
function disappears from the target.  While there are possible
workarounds, they're larger than simply performing the conversion.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-12-24 08:32:15 -08:00
..
meson.build target/riscv: introduce TCG AccelCPUClass 2023-10-12 11:55:21 +10:00
tcg-cpu.c accel/tcg: Move gen_intermediate_code to TCGCPUOps.translate_core 2024-12-24 08:32:15 -08:00
tcg-cpu.h target/riscv: Implement dynamic establishment of custom decoder 2024-06-03 11:12:12 +10:00