qemu/target
Richard Henderson 47d3878422 softfloat: Fix the incorrect computation in float32_exp2
tcg: Remove compatability helpers for qemu ld/st
 target/alpha: Remove TARGET_ALIGNED_ONLY
 target/hppa: Remove TARGET_ALIGNED_ONLY
 target/sparc: Remove TARGET_ALIGNED_ONLY
 tcg: Cleanups preparing to unify calls to qemu_ld/st helpers
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Merge tag 'pull-tcg-20230505' of https://gitlab.com/rth7680/qemu into staging

softfloat: Fix the incorrect computation in float32_exp2
tcg: Remove compatability helpers for qemu ld/st
target/alpha: Remove TARGET_ALIGNED_ONLY
target/hppa: Remove TARGET_ALIGNED_ONLY
target/sparc: Remove TARGET_ALIGNED_ONLY
tcg: Cleanups preparing to unify calls to qemu_ld/st helpers

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# gpg: Signature made Fri 05 May 2023 10:23:33 PM BST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
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# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]

* tag 'pull-tcg-20230505' of https://gitlab.com/rth7680/qemu: (42 commits)
  tcg: Widen helper_*_st[bw]_mmu val arguments
  tcg: Introduce arg_slot_stk_ofs
  tcg: Replace REG_P with arg_loc_reg_p
  tcg: Move TCGLabelQemuLdst to tcg.c
  tcg/sparc64: Pass TCGType to tcg_out_qemu_{ld,st}
  tcg/sparc64: Drop is_64 test from tcg_out_qemu_ld data return
  tcg/s390x: Introduce HostAddress
  tcg/s390x: Pass TCGType to tcg_out_qemu_{ld,st}
  tcg/riscv: Rationalize args to tcg_out_qemu_{ld,st}
  tcg/riscv: Require TCG_TARGET_REG_BITS == 64
  tcg/ppc: Introduce HostAddress
  tcg/ppc: Rationalize args to tcg_out_qemu_{ld,st}
  tcg/mips: Rationalize args to tcg_out_qemu_{ld,st}
  tcg/loongarch64: Introduce HostAddress
  tcg/loongarch64: Rationalize args to tcg_out_qemu_{ld,st}
  tcg/arm: Introduce HostAddress
  tcg/arm: Rationalize args to tcg_out_qemu_{ld,st}
  tcg/aarch64: Introduce HostAddress
  tcg/aarch64: Rationalize args to tcg_out_qemu_{ld,st}
  tcg/i386: Introduce tcg_out_testi
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 22:29:28 +01:00
..
alpha target/alpha: Use MO_ALIGN where required 2023-05-05 17:05:58 +01:00
arm target/arm: Add compile time asserts to load/store_cpu_field macros 2023-05-02 15:47:41 +01:00
avr target/avr: Finish conversion to tcg_gen_qemu_{ld,st}_* 2023-05-05 17:05:28 +01:00
cris target/cris: Finish conversion to tcg_gen_qemu_{ld,st}_* 2023-05-05 17:05:28 +01:00
hexagon target/Hexagon: Finish conversion to tcg_gen_qemu_{ld, st}_* 2023-05-05 17:05:28 +01:00
hppa target/hppa: Use MO_ALIGN for system UNALIGN() 2023-05-05 17:05:58 +01:00
i386 target/i386: Add support for PREFETCHIT0/1 in CPUID enumeration 2023-04-28 12:50:34 +02:00
loongarch target/loongarch: Enables plugins to get instruction codes 2023-04-04 19:33:23 +08:00
m68k target/m68k: Finish conversion to tcg_gen_qemu_{ld,st}_* 2023-05-05 17:05:28 +01:00
microblaze target/microblaze: Remove NB_MMU_MODES define 2023-03-13 06:44:37 -07:00
mips target/mips: Finish conversion to tcg_gen_qemu_{ld,st}_* 2023-05-05 17:05:28 +01:00
nios2 target/nios2: Remove NB_MMU_MODES define 2023-03-13 06:44:37 -07:00
openrisc target/openrisc: Remove NB_MMU_MODES define 2023-03-13 06:44:37 -07:00
ppc tcg: ppc64: Fix mask generation for vextractdm 2023-05-05 12:34:22 -03:00
riscv target/riscv: add Ventana's Veyron V1 CPU 2023-05-05 10:49:50 +10:00
rx target/rx: Avoid tcg_const_i32 2023-03-13 06:44:37 -07:00
s390x target/s390x: Finish conversion to tcg_gen_qemu_{ld, st}_* 2023-05-05 17:05:28 +01:00
sh4 target/sh4: Honor QEMU_LOG_FILENAME with QEMU_LOG=cpu 2023-03-16 10:31:25 +01:00
sparc target/sparc: Use cpu_ld*_code_mmu 2023-05-05 17:09:47 +01:00
tricore target/tricore: Use min/max for saturate 2023-03-13 07:03:39 -07:00
xtensa target/xtensa: Finish conversion to tcg_gen_qemu_{ld, st}_* 2023-05-05 17:05:29 +01:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
meson.build target/loongarch: Add target build suport 2022-06-06 18:09:03 +00:00