qemu/target/arm
Peter Maydell f81a5d6863 target/arm: Explicitly select short-format FSR for M-profile
For M-profile, there is no guest-facing A-profile format FSR, but we
still use the env->exception.fsr field to pass fault information from
the point where a fault is raised to the code in
arm_v7m_cpu_do_interrupt() which interprets it and sets the M-profile
specific fault status registers.  So it doesn't matter whether we
fill in env->exception.fsr in the short format or the LPAE format, as
long as both sides agree.  As it happens arm_v7m_cpu_do_interrupt()
assumes short-form.

In compute_fsr_fsc() we weren't explicitly choosing short-form for
M-profile, but instead relied on it falling out in the wash because
arm_s1_regime_using_lpae_format() would be false.  This was broken in
commit 452c67a4 when we added v8R support, because we said "PMSAv8 is
always LPAE format" (as it is for v8R), forgetting that we were
implicitly using this code path on M-profile. At that point we would
hit a g_assert_not_reached():
 ERROR:../../target/arm/internals.h:549:arm_fi_to_lfsc: code should not be reached

#7  0x0000555555e055f7 in arm_fi_to_lfsc (fi=0x7fffecff9a90) at ../../target/arm/internals.h:549
#8  0x0000555555e05a27 in compute_fsr_fsc (env=0x555557356670, fi=0x7fffecff9a90, target_el=1, mmu_idx=1, ret_fsc=0x7fffecff9a1c)
    at ../../target/arm/tlb_helper.c:95
#9  0x0000555555e05b62 in arm_deliver_fault (cpu=0x555557354800, addr=268961344, access_type=MMU_INST_FETCH, mmu_idx=1, fi=0x7fffecff9a90)
    at ../../target/arm/tlb_helper.c:132
#10 0x0000555555e06095 in arm_cpu_tlb_fill (cs=0x555557354800, address=268961344, size=1, access_type=MMU_INST_FETCH, mmu_idx=1, probe=false, retaddr=0)
    at ../../target/arm/tlb_helper.c:260

The specific assertion changed when commit fcc7404eff added
"assert not M-profile" to arm_is_secure_below_el3(), because the
conditions being checked in compute_fsr_fsc() include
arm_el_is_aa64(), which will end up calling arm_is_secure_below_el3()
and asserting before we try to call arm_fi_to_lfsc():

#7  0x0000555555efaf43 in arm_is_secure_below_el3 (env=0x5555574665a0) at ../../target/arm/cpu.h:2396
#8  0x0000555555efb103 in arm_is_el2_enabled (env=0x5555574665a0) at ../../target/arm/cpu.h:2448
#9  0x0000555555efb204 in arm_el_is_aa64 (env=0x5555574665a0, el=1) at ../../target/arm/cpu.h:2509
#10 0x0000555555efbdfd in compute_fsr_fsc (env=0x5555574665a0, fi=0x7fffecff99e0, target_el=1, mmu_idx=1, ret_fsc=0x7fffecff996c)

Avoid the assertion and the incorrect FSR format selection by
explicitly making M-profile use the short-format in this function.

Fixes: 452c67a427 ("target/arm: Enable TTBCR_EAE for ARMv8-R AArch32")a
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1658
Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230523131726.866635-1-peter.maydell@linaro.org
(cherry picked from commit d7fe699be5)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2023-05-31 09:42:37 +03:00
..
hvf hvf: arm: Add support for GICv3 2023-02-03 12:59:22 +00:00
tcg target/arm: Explicitly select short-format FSR for M-profile 2023-05-31 09:42:37 +03:00
arch_dump.c dump: Replace opaque DumpState pointer with a typed one 2022-10-06 19:30:43 +04:00
arm-powerctl.c target/arm: Wrap arm_rebuild_hflags calls with tcg_enabled 2023-02-27 13:27:04 +00:00
arm-powerctl.h target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset() 2019-02-28 11:03:04 +00:00
arm-qmp-cmds.c target/arm: Restrict 'qapi-commands-machine.h' to system emulation 2023-03-02 07:51:06 +01:00
arm_ldst.h accel/tcg: Add DisasContextBase argument to translator_ld* 2021-09-14 12:00:20 -07:00
common-semi-target.h semihosting: Split out common-semi-target.h 2022-06-28 04:35:07 +05:30
cpregs.h target/arm: Move cpregs code out of cpu.h 2023-02-16 16:11:04 +00:00
cpu-param.h target/arm: Remove NB_MMU_MODES define 2023-03-13 06:44:37 -07:00
cpu-qom.h target/arm: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
cpu.c target/arm: Replace tb_pc() with tb->pc 2023-03-01 07:33:25 -10:00
cpu.h target/arm: Diagnose incorrect usage of arm_is_secure subroutines 2023-03-06 14:08:12 +00:00
cpu64.c target/arm: Add Neoverse-N1 registers 2023-03-21 11:54:39 +00:00
cpu_tcg.c target/arm: Declare CPU <-> NVIC helpers in 'hw/intc/armv7m_nvic.h' 2023-02-16 16:00:47 +00:00
debug_helper.c target/arm: Wrap TCG-only code in debug_helper.c 2023-02-27 13:27:04 +00:00
gdbstub.c target/arm/gdbstub: Only advertise M-profile features if TCG available 2023-03-28 10:53:40 +01:00
gdbstub64.c target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size check 2023-05-14 11:25:57 +03:00
helper-a64.h target/arm: Use tcg_gen_atomic_cmpxchg_i128 for CASP 2023-02-04 06:19:42 -10:00
helper-mve.h target/arm: Implement MVE VRINT insns 2021-09-01 11:08:17 +01:00
helper-sme.h target/arm/sme: Unify set_pstate() SM/ZA helpers as set_svcr() 2023-01-23 13:32:38 +00:00
helper-sve.h target/arm: Implement REVD 2022-07-11 13:43:51 +01:00
helper.c target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size check 2023-05-14 11:25:57 +03:00
helper.h target/arm: Look up ARMCPRegInfo at runtime 2023-01-23 13:32:38 +00:00
hvf_arm.h target: Use forward declared type instead of structure type 2022-03-06 22:22:40 +01:00
idau.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
internals.h target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size check 2023-05-14 11:25:57 +03:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
kvm-consts.h hw/misc: Move some arm-related files from specific_ss into softmmu_ss 2022-12-15 17:37:47 +00:00
kvm-stub.c target/arm: Avoid bare abort() or assert(0) 2022-05-05 09:35:51 +01:00
kvm.c target/arm: Initialize debug capabilities only once 2023-05-10 20:50:38 +03:00
kvm64.c target/arm: Initialize debug capabilities only once 2023-05-10 20:50:38 +03:00
kvm_arm.h target/arm: Initialize debug capabilities only once 2023-05-10 20:50:38 +03:00
machine.c target/arm: Wrap arm_rebuild_hflags calls with tcg_enabled 2023-02-27 13:27:04 +00:00
meson.build target/arm: Restrict 'qapi-commands-machine.h' to system emulation 2023-03-02 07:51:06 +01:00
op_addsub.h Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
ptw.c target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size check 2023-05-14 11:25:57 +03:00
sve_ldst_internal.h target/arm: Use probe_access_full for MTE 2022-10-20 11:27:49 +01:00
syndrome.h target/arm: Implement the HFGITR_EL2.ERET trap 2023-02-03 12:59:24 +00:00
tcg-stubs.c target/arm: Move hflags code into the tcg directory 2023-02-27 13:27:04 +00:00
trace-events docs: fix references to docs/devel/tracing.rst 2021-06-02 06:51:09 +02:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
translate-a32.h target/arm: Define and use new load_cpu_field_low32() 2023-05-10 20:50:38 +03:00
vfp_helper.c target/arm: Improve arm_rmode_to_sf 2023-03-13 06:44:38 -07:00