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qemu/target/i386
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Stefan Hajnoczi 8d56d0fd2f * qom: Use command line syntax for default values in help 
* i386: support cache topology with machine's configuration
 * rust: fix duplicate symbols from monitor-fd.c
 * rust: add module to convert between success/-errno and io::Result
 * rust: move class_init implementation from trait to method
 * pvg: configuration improvements
 * kvm guestmemfd: replace assertion with error
 * riscv: cleanups
 * target/i386/hvf: cleanups to emulation
 * target/i386: add Zhaoxin and Yongfeng CPU model
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Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* qom: Use command line syntax for default values in help
* i386: support cache topology with machine's configuration
* rust: fix duplicate symbols from monitor-fd.c
* rust: add module to convert between success/-errno and io::Result
* rust: move class_init implementation from trait to method
* pvg: configuration improvements
* kvm guestmemfd: replace assertion with error
* riscv: cleanups
* target/i386/hvf: cleanups to emulation
* target/i386: add Zhaoxin and Yongfeng CPU model

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# gpg: Signature made Wed 26 Feb 2025 16:56:43 HKT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
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* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (34 commits)
  target/i386: Mask CMPLegacy bit in CPUID[0x80000001].ECX for Zhaoxin CPUs
  target/i386: Introduce Zhaoxin Yongfeng CPU model
  target/i386: Add CPUID leaf 0xC000_0001 EDX definitions
  target/i386: Add support for Zhaoxin CPU vendor identification
  target/riscv: move 128-bit check to TCG realize
  target/riscv: remove unused macro DEFINE_CPU
  i386/cpu: add has_caches flag to check smp_cache configuration
  i386/pc: Support cache topology in -machine for PC machine
  i386/cpu: Update cache topology with machine's configuration
  i386/cpu: Support module level cache topology
  rust: qom: get rid of ClassInitImpl
  rust: pl011, qemu_api tests: do not use ClassInitImpl
  rust: qom: add ObjectImpl::CLASS_INIT
  rust: add SysBusDeviceImpl
  rust: add IsA bounds to QOM implementation traits
  target/i386/hvf: drop some dead code
  target/i386/hvf: move and rename simulate_{rdmsr, wrmsr}
  target/i386/hvf: move and rename {load, store}_regs
  target/i386/hvf: use x86_segment in x86_decode.c
  target/i386/hvf: fix the declaration of hvf_handle_io
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-03-03 10:20:59 +08:00
..
hvf target/i386/hvf: drop some dead code 2025-02-25 16:18:12 +01:00
kvm i386/cpu: Extract a common fucntion to setup value of MSR_CORE_THREAD_COUNT 2025-01-10 23:34:44 +01:00
nvmm include: Rename sysemu/ -> system/ 2024-12-20 17:44:56 +01:00
tcg fpu: Pass float_status to floatx80_invalid_encoding() 2025-02-25 15:32:57 +00:00
whpx include: Rename sysemu/ -> system/ 2024-12-20 17:44:56 +01:00
arch_dump.c include: Rename sysemu/ -> system/ 2024-12-20 17:44:56 +01:00
arch_memory_mapping.c include: Rename sysemu/ -> system/ 2024-12-20 17:44:56 +01:00
confidential-guest.c target/i386: introduce x86-confidential-guest 2024-04-23 17:35:25 +02:00
confidential-guest.h target/i386/confidential-guest: Fix comment of x86_confidential_guest_kvm_type() 2025-01-10 23:34:44 +01:00
cpu-apic.c qapi: Move include/qapi/qmp/ to include/qobject/ 2025-02-10 15:33:16 +01:00
cpu-dump.c target/i386: remove CC_OP_CLR 2024-10-31 18:28:33 +01:00
cpu-internal.h include: Rename sysemu/ -> system/ 2024-12-20 17:44:56 +01:00
cpu-param.h target/*: Remove TARGET_LONG_BITS from cpu-param.h 2025-02-08 12:41:33 -08:00
cpu-qom.h target: Move ArchCPUClass definition to 'cpu.h' 2023-11-07 13:08:48 +01:00
cpu-system.c qapi: Move include/qapi/qmp/ to include/qobject/ 2025-02-10 15:33:16 +01:00
cpu.c target/i386: Mask CMPLegacy bit in CPUID[0x80000001].ECX for Zhaoxin CPUs 2025-02-26 09:56:18 +01:00
cpu.h target/i386: Add CPUID leaf 0xC000_0001 EDX definitions 2025-02-26 09:54:57 +01:00
gdbstub.c target/i386/gdbstub: Expose orig_ax 2024-10-13 10:05:51 -07:00
helper.c accel/tcg: Move tcg_cflags_has/set() to 'exec/translation-block.h' 2024-12-20 17:44:57 +01:00
helper.h target/i386: optimize computation of ZF from CC_OP_DYNAMIC 2024-10-31 18:28:33 +01:00
host-cpu.c include: Rename sysemu/ -> system/ 2024-12-20 17:44:56 +01:00
host-cpu.h accel-cpu: make cpu_realizefn return a bool 2021-05-10 15:41:50 -04:00
Kconfig i386: select correct components for no-board build 2024-05-10 15:45:15 +02:00
machine.c include: Rename sysemu/ -> system/ 2024-12-20 17:44:56 +01:00
meson.build include: Rename sysemu/ -> system/ 2024-12-20 17:44:56 +01:00
monitor.c qapi: Move include/qapi/qmp/ to include/qobject/ 2025-02-10 15:33:16 +01:00
ops_sse.h target/i386: set CC_OP in helpers if they want CC_OP_EFLAGS 2024-05-25 13:28:01 +02:00
sev-system-stub.c include: Rename sysemu/ -> system/ 2024-12-20 17:44:56 +01:00
sev.c include: Rename sysemu/ -> system/ 2024-12-20 17:44:56 +01:00
sev.h target/i386/sev: Reduce system specific declarations 2024-12-20 17:44:56 +01:00
svm.h target/i386: check intercept for XSETBV 2023-10-17 15:20:53 +02:00
trace-events target/i386/sev: Use size_t for object sizes 2024-06-28 19:26:54 +02:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
xsave_helper.c x86: add support for KVM_CAP_XSAVE2 and AMX state migration 2022-03-15 11:50:50 +01:00