Richard Henderson e4a8e093dc accel/tcg: Move gen_intermediate_code to TCGCPUOps.translate_core ... Convert all targets simultaneously, as the gen_intermediate_code function disappears from the target. While there are possible workarounds, they're larger than simply performing the conversion. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>		2024-12-24 08:32:15 -08:00
..
insn_trans	target/loongarch: Remove avail_64 in trans_srai_w() and simplify it	2024-07-12 09:41:18 +08:00
constant_timer.c	target/loongarch: move translate modules to tcg/	2024-01-06 10:18:52 +08:00
csr_helper.c	system/cpus: rename qemu_mutex_lock_iothread() to bql_lock()	2024-01-08 10:45:43 -05:00
fpu_helper.c	target/loongarch: Set default NaN pattern explicitly	2024-12-11 15:31:05 +00:00
iocsr_helper.c	hw/loongarch/virt: Set iocsr address space per-board rather than percpu	2024-01-11 19:22:47 +08:00
meson.build	target/loongarch: move translate modules to tcg/	2024-01-06 10:18:52 +08:00
op_helper.c	mark <zlib.h> with for-crc32 in a consistent manner	2024-09-20 08:06:56 +03:00
tlb_helper.c	target/loongarch: Fix helper_lddir() a CID INTEGER_OVERFLOW issue	2024-07-24 16:52:18 +08:00
translate.c	accel/tcg: Move gen_intermediate_code to TCGCPUOps.translate_core	2024-12-24 08:32:15 -08:00
vec_helper.c	target/loongarch: move translate modules to tcg/	2024-01-06 10:18:52 +08:00