Li Zhijian 0401c4328f hw/mem/cxl_type3: Add paired msix_uninit_exclusive_bar() call ... msix_uninit_exclusive_bar() should be paired with msix_init_exclusive_bar() Ensure proper resource cleanup by adding the missing `msix_uninit_exclusive_bar()` call for the Type3 CXL device. Signed-off-by: Li Zhijian <lizhijian@fujitsu.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250203161908.145406-3-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>		2025-02-21 07:18:42 -05:00
..
cxl_type3.c	hw/mem/cxl_type3: Add paired msix_uninit_exclusive_bar() call	2025-02-21 07:18:42 -05:00
cxl_type3_stubs.c	hw/cxl/events: Improve QMP interfaces and documentation for add/release dynamic capacity.	2024-07-03 18:14:07 -04:00
Kconfig	hw/cxl/device: Add a memory device (8.2.8.5)	2022-05-13 06:13:36 -04:00
memory-device-stubs.c	memory-device: move stubs out of stubs/	2024-04-18 11:17:27 +02:00
memory-device.c	include: Rename sysemu/ -> system/	2024-12-20 17:44:56 +01:00
meson.build	memory-device: move stubs out of stubs/	2024-04-18 11:17:27 +02:00
npcm7xx_mc.c	hw/*: Use type casting for SysBusDevice in NPCM7XX	2021-01-12 21:19:02 +00:00
nvdimm.c	Accel & Exec patch queue	2024-12-21 11:07:00 -05:00
pc-dimm.c	Accel & Exec patch queue	2024-12-21 11:07:00 -05:00
sparse-mem.c	Accel & Exec patch queue	2024-12-21 11:07:00 -05:00
trace-events	docs: fix references to docs/devel/tracing.rst	2021-06-02 06:51:09 +02:00
trace.h	trace: switch position of headers to what Meson requires	2020-08-21 06:18:24 -04:00