qemu/target
Richard Henderson 02b9d791be target/openrisc: Use tcg_gen_addcio_* for ADDC
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-04-28 13:40:17 -07:00
..
alpha qom: Have class_init() take a const data argument 2025-04-25 17:00:41 +02:00
arm target/arm: Use tcg_gen_addcio_* for ADCS 2025-04-28 13:40:17 -07:00
avr qom: Have class_init() take a const data argument 2025-04-25 17:00:41 +02:00
hexagon target/hexagon: Include missing 'accel/tcg/getpc.h' 2025-04-25 17:09:58 +02:00
hppa target/hppa: Use tcg_gen_addcio_i64 2025-04-28 13:40:17 -07:00
i386 tcg: Merge INDEX_op_extract2_{i32,i64} 2025-04-28 13:40:17 -07:00
loongarch qom: Have class_init() take a const data argument 2025-04-25 17:00:41 +02:00
m68k qom: Have class_init() take a const data argument 2025-04-25 17:00:41 +02:00
microblaze target/microblaze: Use tcg_gen_addcio_i32 2025-04-28 13:40:17 -07:00
mips target/mips: Check CPU endianness at runtime using env_is_bigendian() 2025-04-25 17:09:58 +02:00
openrisc target/openrisc: Use tcg_gen_addcio_* for ADDC 2025-04-28 13:40:17 -07:00
ppc hw/core: Get default_cpu_type calling machine_class_default_cpu_type() 2025-04-25 17:00:41 +02:00
riscv qom: Have class_init() take a const data argument 2025-04-25 17:00:41 +02:00
rx qom: Have class_init() take a const data argument 2025-04-25 17:00:41 +02:00
s390x qom: Constify TypeInfo::class_data 2025-04-25 17:00:41 +02:00
sh4 tcg: Merge INDEX_op_{neg}setcond_{i32,i64}` 2025-04-28 13:40:16 -07:00
sparc qom: Constify TypeInfo::class_data 2025-04-25 17:00:41 +02:00
tricore tcg: Merge INDEX_op_orc_{i32,i64} 2025-04-28 13:40:15 -07:00
xtensa target/xtensa: Evaluate TARGET_BIG_ENDIAN at compile time 2025-04-25 17:09:58 +02:00
Kconfig target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00
meson.build target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00