# By Laszlo Ersek (8) and others
# Via Luiz Capitulino
* luiz/queue/qmp:
scripts/qapi.py: Avoid syntax not supported by Python 2.4
monitor: print the invalid char in error message
OptsVisitor: introduce unit tests, with test cases for range flattening
add "test-int128" and "test-bitops" to .gitignore
OptsVisitor: don't try to flatten overlong integer ranges
OptsVisitor: opts_type_uint64(): recognize intervals when LM_IN_PROGRESS
OptsVisitor: rebase opts_type_uint64() to parse_uint_full()
OptsVisitor: opts_type_int(): recognize intervals when LM_IN_PROGRESS
OptsVisitor: introduce list modes for interval flattening
OptsVisitor: introduce basic list modes
Convert stderr message calling error_get_pretty() to error_report()
Message-id: 1377015041-6567-1-git-send-email-lcapitulino@redhat.com
Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
Rename four functions in preparation for new API.
Rename qemu_timer_expired to timer_expired
Rename qemu_timer_expire_time_ns to timer_expire_time_ns
Rename qemu_timer_pending to timer_pending
Rename qemu_timer_expired_ns to timer_expired_ns
Signed-off-by: Alex Bligh <alex@alex.org.uk>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
All callers always use the same values (get_system_memory(),
get_system_io()), so the parameters are pointless.
If one day we decide to eliminate get_system_memory() and
get_system_io(), we will be able to do that more easily by adding the
values to struct QEMUMachineInitArgs.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
It just needs to set has_pvpanic=false after calling it. This way, it
won't be a special case anymore.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Making the older compat functions call the newer compat functions at the
beginning allows the older functions undo what's done by newer compat
functions. e.g.: pc_compat_1_4() will be able to call pc_compat_1_5()
and then set has_pvpanic=false.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
The pc_init_pci_1_2()/pc_init_pci_1_0() split was made on commit
6fd028f64f, in preparation for commit
9953f8822c. The latter was reverted, so there's
no reason to keep two separate functions that do exactly the same, anymore.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Cc: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Don't explode when the variable is used just a few times, and never
changed.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Don't explode QEMUMachineInitArgs before passing it to pc_init1().
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Pass on the generic arguments unadulterated, and the machine-specific
ones as separate argument.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Don't explode when the variable is used just once, and never changed.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Don't explode QEMUMachineInitArgs before passing it to
sun4m_hw_init(), sun4uv_init().
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
In C99 signed shift (1 << 31) is undefined behavior, since the result
exceeds INT_MAX. Use 1U instead and move the shift after the check.
Signed-off-by: Xi Wang <xi.wang@gmail.com>
Acked-by: Jia Liu <proljc@gmail.com>
Consider the masking of PICSR and PICMR:
((cpu->env.picsr && (1 << i)) && (cpu->env.picmr && (1 << i)))
To correctly mask bits, we should use the bitwise AND "&" rather than
the logical AND "&&". Also, the loop is not necessary for masking.
Simply use (cpu->env.picsr & cpu->env.picmr).
Signed-off-by: Xi Wang <xi.wang@gmail.com>
Acked-by: Jia Liu <proljc@gmail.com>
clang warns that cpu_openrisc_load_kernel() can use 'entry' uninitialized:
hw/openrisc/openrisc_sim.c:69:9: error: variable 'entry' is used uninitialized
whenever '&&' condition is false [-Werror,-Wsometimes-uninitialized]
if (kernel_filename && !qtest_enabled()) {
^~~~~~~~~~~~~~~
hw/openrisc/openrisc_sim.c:91:19: note: uninitialized use occurs here
cpu->env.pc = entry;
^~~~~
Fix this by not attempting to change the CPU's starting PC unless
we actually loaded a kernel.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Jia Liu <proljc@gmail.com>
ROM files that are put in FW CFG are copied to guest ram, by BIOS, but
they are not backed by RAM so they don't get migrated.
Each time we change two bytes in such a ROM this breaks cross-version
migration: since we can migrate after BIOS has read the first byte but
before it has read the second one, getting an inconsistent state.
Future-proof this by creating, for each such ROM,
an MR serving as the backing store.
This MR is never mapped into guest memory, but it's registered
as RAM so it's migrated with the guest.
Naturally, this only helps for -M 1.7 and up, older machine types
will still have the cross-version migration bug.
Luckily the race window for the problem to trigger is very small,
which is also likely why we didn't notice the cross-version
migration bug in testing yet.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Make 1.4 compat code call the 1.6 one, reducing
code duplication. Add comment explaining why we can't
make 1.4 call 1.5 as usual.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
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Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20130820' into staging
target-arm queue
# gpg: Signature made Tue 20 Aug 2013 08:56:28 AM CDT using RSA key ID 14360CDE
# gpg: Can't check signature: public key not found
# By Peter Maydell (20) and Peter Chubb (1)
# Via Peter Maydell
* pmaydell/tags/pull-target-arm-20130820: (21 commits)
hw/timer/imx_epit: Simplify and fix imx_epit implementation
default-configs: Fix A9MP and A15MP config names
hw/cpu/a15mpcore: Wire generic timer outputs to GIC inputs
target-arm: Implement the generic timer
target-arm: Support coprocessor registers which do I/O
target-arm: Allow raw_read() and raw_write() to handle 64 bit regs
hw/arm/pic_cpu: Remove the now-unneeded arm_pic_init_cpu()
hw/arm/xilinx_zynq: Don't use arm_pic_init_cpu()
hw/arm/vexpress: Don't use arm_pic_init_cpu()
hw/arm/versatilepb: Don't use arm_pic_init_cpu()
hw/arm/strongarm: Don't use arm_pic_init_cpu()
hw/arm/realview: Don't use arm_pic_init_cpu()
hw/arm/omap*: Don't use arm_pic_init_cpu()
hw/arm/musicpal: Don't use arm_pic_init_cpu()
hw/arm/kzm: Don't use arm_pic_init_cpu()
hw/arm/integratorcp: Don't use arm_pic_init_cpu()
hw/arm/highbank: Don't use arm_pic_init_cpu()
hw/arm/exynos4210: Don't use arm_pic_init_cpu()
hw/arm/armv7m: Don't use arm_pic_init_cpu()
target-arm: Make IRQ and FIQ gpio lines on the CPU object
...
Message-id: 1377007680-4934-1-git-send-email-peter.maydell@linaro.org
Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
Convert stderr messages calling error_get_pretty()
to error_report().
Timestamp is prepended by -msg timstamp option with it.
Per Markus's comment below, A conversion from fprintf() to
error_report() is always an improvement, regardless of
error_get_pretty().
http://marc.info/?l=qemu-devel&m=137513283408601&w=2
But, it is not reasonable to convert them at one time
because fprintf() is used everwhere in qemu.
So, it should be done step by step with avoiding regression.
Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
# By Stefan Hajnoczi
# Via Stefan Hajnoczi
* stefanha/block-next:
aio: drop io_flush argument
tests: drop event_active_cb()
thread-pool: drop thread_pool_active()
dataplane/virtio-blk: drop flush_true() and flush_io()
block/ssh: drop return_true()
block/sheepdog: drop have_co_req() and aio_flush_request()
block/rbd: drop qemu_rbd_aio_flush_cb()
block/nbd: drop nbd_have_request()
block/linux-aio: drop qemu_laio_completion_cb()
block/iscsi: drop iscsi_process_flush()
block/gluster: drop qemu_gluster_aio_flush_cb()
block/curl: drop curl_aio_flush()
aio: stop using .io_flush()
tests: adjust test-thread-pool to new aio_poll() semantics
tests: adjust test-aio to new aio_poll() semantics
dataplane/virtio-blk: check exit conditions before aio_poll()
block: stop relying on io_flush() in bdrv_drain_all()
block: ensure bdrv_drain_all() works during bdrv_delete()
Message-id: 1376921877-9576-1-git-send-email-stefanha@redhat.com
Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
# By Richard Henderson
# Via Richard Henderson
* rth/axp-next:
target-alpha: Implement the typhoon iommu
target-alpha: Consider the superpage when threading and ending TBs
target-alpha: Use goto_tb in call_pal
target-alpha: Implement call_pal without an exception
Message-id: 1376720412-2165-1-git-send-email-rth@twiddle.net
Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
When imx_epit.c was last refactored, a common usecase (comparison
register zero) broke. This patch fixes that, and simplifies the code
yet more. It also fixes a major thinko in the reset path --- the
wrong bits in the control register were being cleared.
Signed-off-by: Peter Chubb <peter.chubb@nicta.com.au>
Reviewed-by: Jean-Christophe DUBOIS <jcd@tribudubois.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
When individual CONFIG_ switches for the A9MPcore and A15MPcore
devices were created, they were inadvertently given incorrect names
(CONFIG_ARM9MPCORE and CONFIG_ARM15MPCORE). These CPUs are
"Cortex-A9MP" and "Cortex-A15MP", and in particular the ARM9 is
a different (rather older) CPU than the Cortex-A9. Rename the
CONFIG_ switches to bring them into line with the source file
names and CPU names.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1376056215-26391-1-git-send-email-peter.maydell@linaro.org
Now our A15 CPU implements the generic timers, we can wire them
up to the appropriate inputs on the GIC.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Message-id: 1376065080-26661-5-git-send-email-peter.maydell@linaro.org
Drop the now-deprecated arm_pic_init_cpu() in favour of directly
getting the IRQ line from the ARMCPU object.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1375977856-25046-14-git-send-email-peter.maydell@linaro.org
Drop the now-deprecated arm_pic_init_cpu() in favour of directly
getting the IRQ line from the ARMCPU object.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1375977856-25046-13-git-send-email-peter.maydell@linaro.org
Drop the now-deprecated arm_pic_init_cpu() in favour of directly
getting the IRQ line from the ARMCPU object.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1375977856-25046-12-git-send-email-peter.maydell@linaro.org
Drop the now-deprecated arm_pic_init_cpu() in favour of directly
getting the IRQ line from the ARMCPU object.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1375977856-25046-11-git-send-email-peter.maydell@linaro.org
Drop the now-deprecated arm_pic_init_cpu() in favour of directly
getting the IRQ line from the ARMCPU object.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1375977856-25046-10-git-send-email-peter.maydell@linaro.org
Drop the now-deprecated arm_pic_init_cpu() in favour of directly
getting the IRQ line from the ARMCPU object.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1375977856-25046-9-git-send-email-peter.maydell@linaro.org
Drop the now-deprecated arm_pic_init_cpu() in favour of directly
getting the IRQ line from the ARMCPU object.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1375977856-25046-8-git-send-email-peter.maydell@linaro.org
Drop the now-deprecated arm_pic_init_cpu() in favour of directly
getting the IRQ line from the ARMCPU object.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1375977856-25046-7-git-send-email-peter.maydell@linaro.org
Drop the now-deprecated arm_pic_init_cpu() in favour of directly
getting the IRQ line from the ARMCPU object.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1375977856-25046-6-git-send-email-peter.maydell@linaro.org
Drop the now-deprecated arm_pic_init_cpu() in favour of directly
getting the IRQ line from the ARMCPU object.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1375977856-25046-5-git-send-email-peter.maydell@linaro.org
Drop the now-deprecated arm_pic_init_cpu() in favour of directly
getting the IRQ line from the ARMCPU object.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1375977856-25046-4-git-send-email-peter.maydell@linaro.org
Drop the now-deprecated arm_pic_init_cpu() in favour of directly
getting the IRQ line from the ARMCPU object.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1375977856-25046-3-git-send-email-peter.maydell@linaro.org
Now that ARMCPU is a subclass of DeviceState, we can make the
CPU's inbound IRQ and FIQ lines be simply gpio lines, which
means we can remove the odd arm_pic shim.
We retain the arm_pic_init_cpu() function as a backwards
compatibility shim layer so we can convert the board models
to get the IRQ and FIQ lines directly from the ARMCPU
object one at a time.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1375977856-25046-2-git-send-email-peter.maydell@linaro.org
The .io_flush() handler no longer exists and has no users. Drop the
io_flush argument to aio_set_fd_handler() and related functions.
The AioFlushEventNotifierHandler and AioFlushHandler typedefs are no
longer used and are dropped too.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Check exit conditions before entering blocking aio_poll(). This is
mainly for consistency since it's unlikely that we are stopping in the
first event loop iteration.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This way, properties registered in the instance_init function of
child classes will be handled properly by qdev_prop_set_globals(), too.
Includes a unit test for the new functionality.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Since commit c658b94f6e, MIPS raises
exceptions when accessing invalid memory. This is not the correct
behaviour for MIPS Malta Core LV, as the GT-64120A system controller
just ignore undecoded access. This feature is used by the Linux kernel
to probe for some devices.
Emulate the correct behaviour in QEMU by adding an empty slot covering
the entire memory space decoded by the GT-64120A.
Tested-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Context matching caused the 'has_pvpanic = true' to be applied to
the 1.6 machine type instead of the 1.5 machine type.
Reported-by: Markus Armbruster <armbru@redhat.com>
Reported-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This patch is based on Hu Tao's:
http://lists.nongnu.org/archive/html/qemu-devel/2013-08/msg00124.html
No need to hard-code pvpanic as part of the machine.
It can be added with "-device pvpanic" from command line (The next patch).
Anyway, for backport compatibility it is still part of 1.5
machine.
Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com>
Reviewed-by: Hu Tao <hutao@cn.fujitsu.com>
Message-id: 1376233843-19410-2-git-send-email-marcel.a@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Commit 41cb383f42 made a guest-visible
change by adding the PCLMULQDQ bit to Westmere without adding
compatibility code to keep the ABI for older machine-types.
Fix it by adding the missing compat code.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Move the code to hw/i386, the sole remaining property is available
as !pci_enabled.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-id: 1376069702-22330-4-git-send-email-aliguori@us.ibm.com
Rebased.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
