Commit graph

9029 commits

Author SHA1 Message Date
Andreas Färber
f100f0b38f cpus: Pass CPUState to run_on_cpu()
CPUArchState is no longer needed.

Move the declaration to include/qemu/cpu.h and add documentation.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-31 04:12:23 +01:00
Andreas Färber
3993c6bddf cpus: Pass CPUState to [qemu_]cpu_has_work()
For target-mips also change the return type to bool.

Make include paths for cpu-qom.h consistent for alpha and unicore32.

Signed-off-by: Andreas Färber <afaerber@suse.de>
[AF: Updated new target-openrisc function accordingly]
Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
2012-10-31 04:11:37 +01:00
Marcelo Tosatti
19403a68fb cirrus_vga: allow configurable vram size
Allow RAM size to be configurable for cirrus, to allow migration
compatibility from qemu-kvm.

Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-10-30 23:39:50 -02:00
Andreas Färber
b13ce26d3e spapr: Pass PowerPCCPU to hypercalls
Needed for changing cpu_has_work() argument type to CPUState,
used in h_cede().

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-31 01:02:46 +01:00
Andreas Färber
aa100fa4c9 spapr: Pass PowerPCCPU to spapr_hypercall()
Needed for changing the hypercall handlers' argument type to PowerPCCPU.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-31 01:02:45 +01:00
Andreas Färber
1b14670a38 target-ppc: Pass PowerPCCPU to cpu_ppc_hypercall
Adapt emulate_spapr_hypercall() accordingly.

Needed for changing spapr_hypercall() argument type to PowerPCCPU.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-31 01:02:45 +01:00
Andreas Färber
79bbf20bca xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb()
Needed for changing cpu_has_work() argument type to CPUState.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
2012-10-31 01:02:45 +01:00
Andreas Färber
c08d7424d6 cpus: Pass CPUState to qemu_cpu_kick()
CPUArchState is no longer needed there.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-31 01:02:45 +01:00
Andreas Färber
a096124571 ppc: Pass PowerPCCPU to {ppc6xx,ppc970,power7,ppc40x,ppce500}_set_irq()
Needed for changing qemu_cpu_kick() argument type to CPUState and
for moving halted field into CPUState.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-31 01:02:45 +01:00
Andreas Färber
f324e7667a cpu: Move stopped field to CPUState
Change its type to bool.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-31 01:02:44 +01:00
Andreas Färber
b6444a42c0 ppce500_spin: Store PowerPCCPU in SpinKick
Needed for moving stopped field to CPUState.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-31 01:02:44 +01:00
Andreas Färber
60e82579c7 cpus: Pass CPUState to qemu_cpu_is_self()
Change return type to bool, move to include/qemu/cpu.h and
add documentation.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
[AF: Updated new caller qemu_in_vcpu_thread()]
2012-10-31 01:02:39 +01:00
Andreas Färber
e9f9d6b165 target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi()
Simplifies the call in apic_sipi() again and needed for moving halted
field to CPUState.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-10-30 22:38:37 +01:00
Andreas Färber
60671e583c apic: Store X86CPU in APICCommonState
Prepares for using a link<> property to connect APIC with CPU and for
changing the CPU APIs to CPUState.

Resolve Coding Style warnings by moving the closing parenthesis of
foreach_apic() macro to next line.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-10-30 22:38:37 +01:00
Andreas Färber
449994eb58 target-i386: Inline APIC cpu_env property setting
This prepares for changing the variable type from void*.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-10-30 22:38:37 +01:00
Igor Mammedov
bdeec80217 target-i386: Initialize APIC at CPU level
(L)APIC is a part of cpu [1] so move APIC initialization inside of
x86_cpu object. Since cpu_model and override flags currently specify
whether APIC should be created or not, APIC creation&initialization is
moved into x86_cpu_apic_init() which is called from x86_cpu_realize().

[1] - all x86 cpus have integrated APIC if we overlook existence of i486,
and it's more convenient to model after majority of them.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-30 22:38:37 +01:00
Blue Swirl
742a40229d Merge branch 'qspi.2' of git://developer.petalogix.com/public/qemu
* 'qspi.2' of git://developer.petalogix.com/public/qemu:
  xilinx_zynq: added QSPI controller
  xilinx_spips: Generalised to model QSPI
  m25p80: Support for Quad SPI
2012-10-30 18:35:18 +00:00
Paolo Bonzini
f627aab1cc aio: introduce AioContext, move bottom halves there
Start introducing AioContext, which will let us remove globals from
aio.c/async.c, and introduce multiple I/O threads.

The bottom half functions now take an additional AioContext argument.
A bottom half is created with a specific AioContext that remains the
same throughout the lifetime.  qemu_bh_new is just a wrapper that
uses a global context.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-30 09:30:53 +01:00
Igor Mitsyanko
50a5be6c3d hw/sd.c: add SD card save/load support
This patch updates SD card model to support save/load of card's state.

Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:12 +00:00
Igor Mitsyanko
f2d189d384 hw/sd.c: Fix erase for high capacity cards
Standard capacity cards SDSC use byte unit address while SDHC and SDXC cards use
block unit address (512 bytes) when setting ERASE_START and ERASE_END with CMD32
and CMD33, we have to account for this.

Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:12 +00:00
Peter Crosthwaite
fc5b64d082 pflash_cfi01: Fix debug mode printfery
This DPRINTF was throwing a warning due to a missing cast.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:11 +00:00
Peter Crosthwaite
368a354f02 pflash_cfi0x: QOMified
QOMified the pflash_cfi0x so machine models can connect them up in custom ways.

Kept the pflash_cfi0x_register functions as is. They can still be used to
create a flash straight onto system memory.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:11 +00:00
Peter Crosthwaite
be65f89992 pflash_cfi01: remove unused total_len field
This field is completely unused.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:11 +00:00
Peter Crosthwaite
b7dff23a48 pflash_cfi0x: remove unused base field
This field is completely unused. The base address should also be abstracted
away from the device anyway. Removed.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:11 +00:00
Peter Maydell
5170d661dc hw/versatile_i2c: Use LOG_GUEST_ERROR
Use LOG_GUEST_ERROR to report bad guest accesses.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:11 +00:00
Peter Maydell
a35d4e4223 hw/arm_l2x0: Use LOG_GUEST_ERROR
Use LOG_GUEST_ERROR to report bad guest accesses.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:10 +00:00
Peter Maydell
0c896f0662 hw/arm_sysctl: Use LOG_GUEST_ERROR
Use LOG_GUEST_ERROR to report bad guest accesses.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:10 +00:00
Peter Maydell
e72e3ffc3d hw/armv7m_nvic: Use LOG_GUEST_ERROR and LOG_UNIMP
Use LOG_GUEST_ERROR and LOG_UNIMP rather than hw_error() where
appropriate.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:10 +00:00
Peter Maydell
edb94a41e3 hw/arm_timer: Use LOG_GUEST_ERROR and LOG_UNIMP
Use LOG_GUEST_ERROR to report guest accesses to bad register
offsets, and LOG_UNIMP for access to the unimplemented
test registers.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:10 +00:00
Peter Maydell
8c8dc39fa6 hw/arm_gic: Use LOG_GUEST_ERROR
Use LOG_GUEST_ERROR to report guest accesses to bad offsets.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:10 +00:00
Peter Maydell
f9fe7bdad8 hw/arm11mpcore: Use LOG_GUEST_ERROR rather than hw_error()
Use LOG_GUEST_ERROR to report guest accesses to bad offsets.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:09 +00:00
Peter Maydell
2d746989bf hw/pl190: Use LOG_UNIMP rather than hw_error()
Use LOG_UNIMP to report attempts to use the unimplemented test mode.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:09 +00:00
Peter Maydell
375cb56029 hw/pl110: Use LOG_GUEST_ERROR rather than hw_error()
Use LOG_GUEST_ERROR to report guest accesses to invalid register
offsets.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:09 +00:00
Peter Maydell
df37416218 hw/pl080: Use LOG_GUEST_ERROR and LOG_UNIMP
Use LOG_GUEST_ERROR and LOG_UNIMP in preference to hw_error().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:09 +00:00
Peter Maydell
abff909c94 hw/pl061: Use LOG_GUEST_ERROR
Use LOG_GUEST_ERROR to report guest attempts to access bad register offsets.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:09 +00:00
Peter Maydell
fbfecf43e9 hw/pl050: Use LOG_GUEST_ERROR
Use LOG_GUEST_ERROR for reporting guest attempts to access invalid register
offsets.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:08 +00:00
Peter Maydell
7f0f774003 hw/exynos4_boards: Don't prematurely explode QEMUMachineInitArgs
Don't explode QEMUMachineInitArgs before passing it to
exynos4_boards_init_common().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:08 +00:00
Peter Maydell
6efa6d5038 hw/mainstone: Don't prematurely explode QEMUMachineInitArgs
Don't explode QEMUMachineInitArgs before passing it to mainstone_init().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:08 +00:00
Peter Maydell
462b69bba3 hw/nseries: Don't prematurely explode QEMUMachineInitArgs
Don't explode QEMUMachineInitArgs before passing it to n8x0_init().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:08 +00:00
Peter Maydell
6952625da8 hw/omap_sx1: Don't prematurely explode QEMUMachineInitArgs
Don't explode QEMUMachineInitArgs before passing it to the
omap_sx1 common init function.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:08 +00:00
Peter Maydell
72a9f5b7c3 hw/spitz: Don't prematurely explode QEMUMachineInitArgs
Don't explode QEMUMachineInitArgs before calling common init function.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:07 +00:00
Peter Maydell
1b523b5bfc hw/versatilepb: Don't prematurely explode QEMUMachineInitArgs
Don't explode QEMUMachineInitArgs before passing it to the common
versatile init function.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:07 +00:00
Peter Maydell
db4ff6f111 hw/realview.c: Don't prematurely explode QEMUMachineInitArgs
Don't explode QEMUMachineInitArgs in every realview init
function; just pass it to the common realview_init() code
instead.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:07 +00:00
Peter Maydell
f3cdbc329f hw/vexpress.c: Don't prematurely explode QEMUMachineInitArgs
Don't explode QEMUMachineInitArgs before passing it to the vexpress
common init function.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:07 +00:00
Andre Beckus
0e8153dde7 hw/armv7m_nvic: Implement byte/halfword access for NVIC SCB_SHPRx registers
Implement byte/halfword read and write for the NVIC SCB_SHPRx
(System Handler Priority Registers).  Do this by removing SHPR word access
from nvic_readl/writel and adding common code to hande all access
sizes in nvic_sysreg_read/write.

Because the "nvic_state *s" variable now needs to be declared in
nvic_sysreg_read/write, the "void *opaque" parameter of
nvic_readl/writel is changed to "nvic_state *s".

Signed-off-by: Andre Beckus <mikemail98-qemu@yahoo.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-30 07:45:07 +00:00
Aurelien Jarno
38c4718392 Merge branch 's390-for-upstream' of git://repo.or.cz/qemu/agraf
* 's390-for-upstream' of git://repo.or.cz/qemu/agraf:
  s390: sclp ascii console support
  s390: sclp signal quiesce support
  s390: sclp event support
  s390: sclp base support
  s390: use sync regs for register transfer
  s390/kvm_stat: correct sys_perf_event_open syscall number
  s390x: fix -initrd in virtio machine
2012-10-30 00:35:43 +01:00
Anthony Liguori
233926fafa virtio,pci infrastructure
This includes infrastructure patches that don't do much by themselves
 but should help vfio and q35 make progress.
 Also included is rework of virtio-net to use iovec APIs
 for vector access - helpful to make it more secure
 and in preparation for a new feature that will allow
 arbitrary s/g layout for guests.
 Also included is a pci bridge bugfix by Avi.
 
 Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Merge remote-tracking branch 'mst/tags/for_anthony' into staging

virtio,pci infrastructure

This includes infrastructure patches that don't do much by themselves
but should help vfio and q35 make progress.
Also included is rework of virtio-net to use iovec APIs
for vector access - helpful to make it more secure
and in preparation for a new feature that will allow
arbitrary s/g layout for guests.
Also included is a pci bridge bugfix by Avi.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

* mst/tags/for_anthony: (25 commits)
  pci: avoid destroying bridge address space windows in a transaction
  virtio-net: enable mrg buf header in tap on linux
  virtio-net: test peer header support at init time
  virtio-net: minor code simplification
  virtio-net: simplify rx code
  virtio-net: switch tx to safe iov functions
  virtio-net: first s/g is always at start of buf
  virtio-net: refactor receive_hdr
  virtio-net: use safe iov operations for rx
  virtio-net: avoid sg copy
  iov: add iov_cpy
  virtio-net: track host/guest header length
  pcie: Convert PCIExpressHost to use the QOM.
  pcie: pass pcie window size to pcie_host_mmcfg_update()
  pci: Add class 0xc05 as 'SMBus'
  pci: introduce pci_swizzle_map_irq_fn() for standardized interrupt pin swizzle
  pci_ids: add intel 82801BA pci-to-pci bridge id
  pci: pci capability must be in PCI space
  pci: make each capability DWORD aligned
  qemu: enable PV EOI for qemu 1.3
  ...

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-10-29 14:31:47 -05:00
Heinz Graalfs
130c57c036 s390: sclp ascii console support
This code adds console support  by implementing SCLP's ASCII Console
Data event. This is the same console as LPARs ASCII console or z/VMs
sysascii.

The console can be specified manually with something like
-chardev stdio,id=charconsole0 -device sclpconsole,chardev=charconsole0,id=console0

Newer kernels will autodetect that console and prefer that over virtio
console.

When data is received from the character layer it creates a service
interrupt to trigger a Read Event Data command from the guest that will
pick up the received character byte-stream.
When characters are echo'ed by the linux guest a Write Event Data occurs
which is forwarded by the Event Facility to the console that supports
a corresponding mask value.
Console resizing is not supported.
The character layer byte-stream is buffered using a fixed size iov
buffer.

Signed-off-by: Heinz Graalfs <graalfs@linux.vnet.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29 19:41:56 +01:00
Heinz Graalfs
ab9074b559 s390: sclp signal quiesce support
This implements the sclp signal quiesce event via the SCLP Event
Facility.
This allows to gracefully shutdown a guest by using system_powerdown
notifiers. It creates a service interrupt that will trigger a
Read Event Data command from the guest. This code will then add an
event that is interpreted by linux guests as ctrl-alt-del.

Signed-off-by: Heinz Graalfs <graalfs@linux.vnet.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29 19:41:56 +01:00
Heinz Graalfs
559a17a143 s390: sclp event support
Several SCLP features are considered to be events. Those events don't
provide SCLP commands on their own, instead they are all based on
Read Event Data, Write Event Data, Write Event Mask and the service
interrupt. Follow-on patches will provide SCLP's Signal Quiesce (via
system_powerdown) and the ASCII console.
Further down the road the sclp line mode console and configuration
change events (e.g. cpu hotplug) can be implemented.

Signed-off-by: Heinz Graalfs <graalfs@linux.vnet.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-29 19:41:56 +01:00