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10331 commits

Author SHA1 Message Date
Alexander Graf
cba2026a41 PPC: mpc8544ds: Span initial TLB entry over as much RAM as we need
The initial TLB entry is supposed to help us run the guest -kernel payload.
This means the guest needs to be able to access its own memory, the initrd
memory and the device tree.

So far we only statically reserved a TLB entry from [0;256M[. This patch
fixes it to span from [0;dt_end[, allowing the guest payload to access
everything initially.

Reported-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24 01:04:44 +02:00
Gerd Hoffmann
9e56edcf8d vga: raise default vgamem size
Old size: 8 MB (traditional upstream qemu value).
New size: 16 MB (traditional qemu-kvm value).

Also adds compat properties so old machine types
keep the old default values.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-06-22 10:49:55 +02:00
Gerd Hoffmann
f1dacf1ced add pc-1.2 2012-06-22 10:49:55 +02:00
Alon Levy
13d1fd44c4 qxl: add vgamem_size_mb and vgamem_size
In preperation for supporting a larger framebuffer for multiple monitors
on a single card, add a property to qxl vgamem_size_mb, and corresponding
byte sized vgamem_size, and use instead of VGA_RAM_SIZE.

[ kraxel: simplify property handling, add sanity checks ]
[ kraxel: fix mode copying ]

Signed-off-by: Alon Levy <alevy@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-06-22 10:49:45 +02:00
Gerd Hoffmann
4a1e244eb6 vga: make vram size configurable
Zap the global VGA_RAM_SIZE #define, make the vga ram size configurable
for standard vga and vmware vga.  cirrus and qxl are left with a fixed
size (and private VGA_RAM_SIZE #define) for now.

qxl needs some non-trivial adjustments in the mode list handling deal
with a runtime-configurable size, which calls for a separate qxl patch.

cirrus emulates cards which have 2 MB (isa) and 4 MB (pci), so I guess
it would make sense to use these sizes.  That change would break
migration though, so I left it fixed at 8 MB size.  Making it
configurabls is pretty pointless for cirrus as we have to match real
hardware.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-06-22 10:46:12 +02:00
Gerd Hoffmann
e9c6149f6a vga: raise xres+yres limits
The vgabios will check whenever any given video mode will fit into the
given video memory before adding it to the list of available modes, so
there is no need to keep xmax * ymax * 32bpp lower than VGA_RAM_SIZE.

Lets raise the limits a bit.  Should be good for a few years, display
sizes are not growing that fast.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-06-22 10:46:12 +02:00
Alon Levy
a5f68c22e7 qxl: reset current_async on qxl_soft_reset
Signed-off-by: Alon Levy <alevy@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-06-22 10:46:12 +02:00
Alon Levy
087e6a42ed hw/qxl: ignore guest from guestbug until reset
soft_reset is called from any of:
 * QXL_IO_RESET
 * vga io
 * pci reset handler

Signed-off-by: Alon Levy <alevy@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-06-22 10:46:12 +02:00
Alon Levy
0f7bfd8198 qxl: stop dirty loging when not in vga mode
Tested with linux guest. Not sure how to check actual performance affect
of this. Checked with the previously send traceevent that the kvm ioctl
to start/stop dirty logging is being called.
(KVM_SET_USER_MEMORY_REGION).

Signed-off-by: Alon Levy <alevy@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-06-22 10:46:12 +02:00
Alon Levy
0a530548a1 hw/qxl: s/qxl_guest_bug/qxl_set_guest_bug/
Signed-off-by: Alon Levy <alevy@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-06-22 10:46:12 +02:00
Peter A. G. Crosthwaite
5eb9840171 arm_gic: Send dbg msgs to stderr not stdout
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-06-22 09:41:31 +01:00
Blue Swirl
cced7a13a2 fdc: use LOG_UNIMP logging
Convert uses of FLOPPY_ERROR to either FLOPPY_DPRINTF
(for implemented cases) or to use LOG_UNIMP (unimplemented).

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-21 18:45:24 +00:00
Jiang Yunhong
3854ca577d Introduce Xen PCI Passthrough, MSI
A more complete history can be found here:
git://xenbits.xensource.com/qemu-xen-unstable.git

Signed-off-by: Jiang Yunhong <yunhong.jiang@intel.com>
Signed-off-by: Shan Haitao <haitao.shan@intel.com>
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2012-06-21 16:06:11 +00:00
Anthony PERARD
9886c23aed Introduce apic-msidef.h
This patch move the msi definition from apic.c to apic-msidef.h. So it can be
used also by other .c files.

Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
2012-06-21 16:06:11 +00:00
Allen Kay
93d7ae8e77 Introduce Xen PCI Passthrough, PCI config space helpers
A more complete history can be found here:
git://xenbits.xensource.com/qemu-xen-unstable.git

Signed-off-by: Allen Kay <allen.m.kay@intel.com>
Signed-off-by: Guy Zana <guy@neocleus.com>
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2012-06-21 16:06:11 +00:00
Allen Kay
eaab4d60d3 Introduce Xen PCI Passthrough, qdevice
A more complete history can be found here:
git://xenbits.xensource.com/qemu-xen-unstable.git

Signed-off-by: Allen Kay <allen.m.kay@intel.com>
Signed-off-by: Guy Zana <guy@neocleus.com>
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2012-06-21 16:06:10 +00:00
Anthony PERARD
679042f0e1 qdev-properties: Introduce pci-host-devaddr.
This new property will be used to specify a host pci device address.

Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2012-06-21 16:06:10 +00:00
Anthony PERARD
7aa8cbb921 pci.c: Add opaque argument to pci_for_each_device.
The purpose is to have a more generic pci_for_each_device by passing an extra
argument to the function called on every device.

This patch will be used in a next patch.

Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2012-06-21 16:06:10 +00:00
Anthony PERARD
396af688fc Introduce XenHostPCIDevice to access a pci device on the host.
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2012-06-21 16:06:10 +00:00
Anthony PERARD
9ff706c815 pci_ids: Add INTEL_82599_SFP_VF id.
We are using this in our quirk lookup provided by patch
titled: Introduce Xen PCI Passthrough, PCI config space helpers.

Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2012-06-21 16:06:10 +00:00
Peter A. G. Crosthwaite
7798a8828a xilinx_timer: Fixed deadlock issue
The timer was deadlocking when the interval was set too low. It would cause a
flood of timer events and the CPU would halt indefinately. This is a known issue
and theres a generic workaround in place in ptimer on ptimer_set_limit(),
however the Xilinx timer uses ptimer_set_count() instead of set_limit. Changed
the call to set_count() to an equivalent call of set_limit() instead, which
brings the workaround into play.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-06-21 15:19:16 +02:00
Peter A. G. Crosthwaite
fc3511d4d8 xilinx_timer: Removed include of qemu-timer
The Xilinx timer does not interact with the qemu_timer API, so dont include it.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-06-21 15:19:16 +02:00
Anthony PERARD
e108a3c110 xenstore: Use <xenstore.h>
In the next release of Xen (4.2), xs.h became deprecated.

Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2012-06-21 11:44:35 +00:00
Anthony PERARD
b41f671972 xen: Reorganize includes of Xen headers.
Because xs.h will be remove in future release of Xen, this patch removes the
extra includes of this headers.

Also, it removes the extra includes of xenctrl.h and xen/io/xenbus.h as there
already are in xen_common.h.

Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2012-06-21 11:43:59 +00:00
Gerd Hoffmann
77fa9aee38 uhci: fix uhci_async_cancel_all
We update the QTAILQ in the loop, thus we must use the SAFE version
to make sure we don't touch the queue struct after freeing it.

https://bugzilla.novell.com/show_bug.cgi?id=766310

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-06-20 14:46:02 +02:00
Gerd Hoffmann
a229c0535b usb-host: live migration support
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-06-20 14:46:02 +02:00
Gerd Hoffmann
a844ed842d usb-host: attach only to running guest
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-06-20 14:46:02 +02:00
Gerd Hoffmann
30e9d4120f ehci: tracing improvements
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-06-20 14:46:02 +02:00
Gerd Hoffmann
495d544798 usb: restore USBDevice->attached on vmload
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-06-20 14:46:02 +02:00
Gerd Hoffmann
9a77340827 ehci: add live migration support
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-06-20 14:46:02 +02:00
Peter Maydell
9ee703b096 hw/pxa2xx_pic: Convert coprocessor registers to new scheme
Convert the coprocessor access functions for the pxa2xx PIC to the
arm_cp_reginfo scheme.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:01:58 +00:00
Peter Maydell
e2f8a44d0d hw/pxa2xx.c: Convert CLKCFG and PWRMODE cp14 regs
Convert the PXA2xx CLKCFG and PWRMODE cp14 registers to the
new arm_cp_reginfo scheme.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:01:55 +00:00
Peter Maydell
dc2a9045cf hw/pxa2xx: Convert cp14 perf registers to new scheme
Convert the PXA2xx cp14 perf registers from old-style
coprocessor hooks to the new scheme.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-20 12:01:52 +00:00
Crístian Viana
93bfef4c6e Allow machines to configure the QEMU_VERSION that's exposed via hardware
QEMU exposes its version to the guest's hardware and in some cases that is wrong
(e.g. Windows prints messages about driver updates when you switch
the QEMU version).
There is a new field now on the struct QEmuMachine, hw_version, which may
contain the version that the specific machine should report. If that field is
set, then that machine will report that version to the guest.

Signed-off-by: Crístian Viana <vianac@linux.vnet.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-19 13:36:56 -05:00
Gleb Natapov
459ae5ea5a Add PIIX4 properties to control PM system states.
This patch adds two things. First it allows QEMU to distinguish between
regular powerdown and S4 powerdown. Later separate QMP notification will
be added for S4 powerdown. Second it allows S3/S4 states to be disabled
from QEMU command line. Some guests known to be broken with regards to
power management, but allow to use it anyway. Using new properties
management will be able to disable S3/S4 for such guests.

Supported system state are passed to a firmware using new fw_cfg file.
The file contains  6 byte array. Each byte represents one system
state. If byte at offset X has its MSB set it means that system state
X is supported and to enter it guest should use the value from lowest 3
bits.

Signed-off-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-19 13:36:56 -05:00
Anthony Liguori
dcff25f2cd make: automatically include dependencies in recursive subdir rules (v2)
I think I understand enough of what's going on in these rules to ensure this is
right.  But I could certainly use a second or third opinion...

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-19 13:32:42 -05:00
Peter A. G. Crosthwaite
5e87975c87 arm_boot: Conditionalised DTB command line update
The DTB command line should only be overwritten if the user provides a command
line with -append. Otherwise whatever command line was in the DTB should stay
unchanged.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-19 13:24:44 +00:00
Peter A. G. Crosthwaite
69efc0265f cadence_ttc: changed master clock frequency
Change the timer clock frequency to 133MHz which is correct. the old 2.5MHz
value was for the pre-silicon emulation platform.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-19 13:24:44 +00:00
Jim Meyering
5fbe02e8bb cadence_gem: avoid stack-writing buffer-overrun
Use sizeof(rxbuf)-size (not sizeof(rxbuf-size)) as the number
of bytes to clear.  The latter would always clear 4 or 8
bytes, possibly writing beyond the end of that stack buffer.
Alternatively, depending on the value of the "size" parameter,
it could fail to initialize the end of "rxbuf".
Spotted by coverity.

Signed-off-by: Jim Meyering <meyering@redhat.com>
Reviewed-by: Peter A.G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-19 13:24:44 +00:00
Peter Maydell
c97338dca0 hw/a9mpcore: Fix compilation failure if physaddrs are 64 bit
Add a cast to a logging printf to avoid a compilation failure
if target_phys_addr_t is a 64 bit type. (This is better than
using TARGET_FMT_plx because we really don't need a full
16 digit hex string to print the offset into a device.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Blake <eblake@redhat.com>
2012-06-19 13:24:44 +00:00
Peter Maydell
cff0cfbed5 hw/omap.h: Drop broken MEM_VERBOSE tracing
Remove the MEM_VERBOSE tracing option from omap.h. This worked by
intercepting cpu_register_io_memory() calls; it has been broken
since cpu_register_io_memory() was removed in favour of the
MemoryRegion API.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-19 13:24:44 +00:00
Peter Maydell
1e8cae4dfe hw/armv7m_nvic: Make the NVIC a freestanding class
Rearrange the GIC and NVIC so both are straightforward
subclasses of a common class, rather than having the NVIC
source file textually include arm_gic.c.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-19 13:24:44 +00:00
Peter Maydell
2b518c56a6 hw/arm_gic: Move CPU interface memory region setup into arm_gic_init
Remove more NVIC ifdefs by moving the code to setup the CPU interface
memory regions into the GIC specific arm_gic_init() function rather
than the gic_init() function. Rename the latter to more closely
reflect what it's now actually doing.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-19 13:24:44 +00:00
Peter Maydell
84e4fccb7f hw/arm_gic.c: Make NVIC interrupt numbering a runtime setting
Make the minor tweaks to interrupt numbering used by the NVIC
a runtime setting rather than a compile time one, so we can
drop more NVIC ifdefs.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-19 13:24:44 +00:00
Peter Maydell
6b9680bb58 hw/arm_gic: Make CPU target registers RAZ/WI on uniprocessor
The GIC spec says that the CPU target registers should RAZ/WI
for uniprocessor implementations. Implement this, which also
conveniently lets us drop an NVIC ifdef.

Annoyingly, the 11MPCore's GIC is the odd one out, since
it always has these registers, even in uniprocessor configs.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-19 13:24:44 +00:00
Peter Maydell
306a571a2d hw/arm_gic: Add qdev property for GIC revision
GIC behaviour can be different between revision 1 and
2 of the architectural GIC specification; we also have
to handle the legacy 11MPCore GIC, which is different
again in some places. Introduce a qdev property so we
can behave appropriately.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-19 13:24:44 +00:00
Peter Maydell
2a29ddee82 hw/armv7m_nvic: Use MemoryRegions for NVIC specific registers
Implement the NVIC specific register areas using a set of
overlaid MemoryRegions in a container, rather than by having
the arm_gic read/write functions use special purpose callbacks.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-19 13:24:44 +00:00
Peter Maydell
b3387ede2f hw/arm_gic: Move NVIC specific reset to armv7m_nvic_reset
Move the NVIC specific bits of reset to the NVIC's own
reset function, rather than using ifdefs in the common
arm_gic reset.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-19 13:24:44 +00:00
Peter Maydell
c48c6522f5 hw/arm_gic: Remove the special casing of NCPU for the NVIC
Drop the special casing of NCPU=1 for the NVIC. This slightly
increases the amount of memory used by its state structure,
but removes some ifdeffery and means we can safely move the
GIC state into a common subclass structure.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-06-19 13:24:44 +00:00
Peter Maydell
acd684280f hw/arm_gic: Remove NVIC ifdefs from gic_state struct
Remove some NVIC ifdefs from the gic_state struct and its
state save/load functions. This means there are some fields
in it which are present for the NVIC but not used, but means
it always has the same layout and can be pulled out into a
common subclass.

Note that the addition of irq_target[] to the save/load
struct for the NVIC requires a vmstate version bump.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
2012-06-19 13:24:44 +00:00