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1577 commits

Author SHA1 Message Date
Stefan Hajnoczi
989dd906ed Accelerators patches
- Generic API consolidation, cleanups (dead code removal, documentation added)
 - Remove monitor TCG 'info opcount' and @x-query-opcount
 - Have HVF / NVMM / WHPX use generic CPUState::vcpu_dirty field
 - Expose nvmm_enabled() and whpx_enabled() to common code
 - Have hmp_info_registers() dump vector registers
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Merge tag 'accel-20250704' of https://github.com/philmd/qemu into staging

Accelerators patches

- Generic API consolidation, cleanups (dead code removal, documentation added)
- Remove monitor TCG 'info opcount' and @x-query-opcount
- Have HVF / NVMM / WHPX use generic CPUState::vcpu_dirty field
- Expose nvmm_enabled() and whpx_enabled() to common code
- Have hmp_info_registers() dump vector registers

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# gpg: Signature made Fri 04 Jul 2025 06:18:06 EDT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'accel-20250704' of https://github.com/philmd/qemu: (31 commits)
  MAINTAINERS: Add me as reviewer of overall accelerators section
  monitor/hmp-cmds-target: add CPU_DUMP_VPU in hmp_info_registers()
  accel: Pass AccelState argument to gdbstub_supported_sstep_flags()
  accel: Remove unused MachineState argument of AccelClass::setup_post()
  accel: Directly pass AccelState argument to AccelClass::has_memory()
  accel/kvm: Directly pass KVMState argument to do_kvm_create_vm()
  accel/kvm: Prefer local AccelState over global MachineState::accel
  accel/tcg: Prefer local AccelState over global current_accel()
  accel: Propagate AccelState to AccelClass::init_machine()
  accel: Keep reference to AccelOpsClass in AccelClass
  accel: Expose and register generic_handle_interrupt()
  accel/dummy: Extract 'dummy-cpus.h' header from 'system/cpus.h'
  accel/whpx: Expose whpx_enabled() to common code
  accel/nvmm: Expose nvmm_enabled() to common code
  accel/system: Document cpu_synchronize_state_post_init/reset()
  accel/system: Document cpu_synchronize_state()
  accel/kvm: Remove kvm_cpu_synchronize_state() stub
  accel/whpx: Replace @dirty field by generic CPUState::vcpu_dirty field
  accel/nvmm: Replace @dirty field by generic CPUState::vcpu_dirty field
  accel/hvf: Replace @dirty field by generic CPUState::vcpu_dirty field
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-04 08:58:49 -04:00
Philippe Mathieu-Daudé
842e7eecd4 accel: Pass AccelState argument to gdbstub_supported_sstep_flags()
In order to have AccelClass methods instrospect their state,
we need to pass AccelState by argument.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250703173248.44995-37-philmd@linaro.org>
2025-07-04 12:08:44 +02:00
Philippe Mathieu-Daudé
1e9fb43d30 accel: Remove unused MachineState argument of AccelClass::setup_post()
This method only accesses xen_domid/xen_domid_restrict, which are both
related to the 'accelerator', not the machine. Besides, xen_domid aims
to be in Xen AccelState and xen_domid_restrict a xen_domid_restrict
QOM property.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250703173248.44995-36-philmd@linaro.org>
2025-07-04 12:08:44 +02:00
Philippe Mathieu-Daudé
8dd5e6befc accel: Directly pass AccelState argument to AccelClass::has_memory()
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250703173248.44995-34-philmd@linaro.org>
2025-07-04 12:08:44 +02:00
Philippe Mathieu-Daudé
583d1c8f16 accel/kvm: Directly pass KVMState argument to do_kvm_create_vm()
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250703173248.44995-35-philmd@linaro.org>
2025-07-04 12:08:44 +02:00
Philippe Mathieu-Daudé
f0db25adcf accel/kvm: Prefer local AccelState over global MachineState::accel
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250703173248.44995-32-philmd@linaro.org>
2025-07-04 12:08:44 +02:00
Philippe Mathieu-Daudé
0fdcfc3baf accel/tcg: Prefer local AccelState over global current_accel()
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250703173248.44995-33-philmd@linaro.org>
2025-07-04 12:08:44 +02:00
Philippe Mathieu-Daudé
51e1896199 accel: Propagate AccelState to AccelClass::init_machine()
In order to avoid init_machine() to call current_accel(),
pass AccelState along.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20250703173248.44995-31-philmd@linaro.org>
2025-07-04 12:08:44 +02:00
Philippe Mathieu-Daudé
38623a9f63 accel: Keep reference to AccelOpsClass in AccelClass
Allow dereferencing AccelOpsClass outside of accel/accel-system.c.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20250703173248.44995-30-philmd@linaro.org>
2025-07-04 12:08:44 +02:00
Philippe Mathieu-Daudé
b9b8ce0384 accel: Expose and register generic_handle_interrupt()
In order to dispatch over AccelOpsClass::handle_interrupt(),
we need it always defined, not calling a hidden handler under
the hood. Make AccelOpsClass::handle_interrupt() mandatory.
Expose generic_handle_interrupt() prototype and register it
for each accelerator.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Message-Id: <20250703173248.44995-29-philmd@linaro.org>
2025-07-04 12:08:44 +02:00
Philippe Mathieu-Daudé
e8388158e6 accel/dummy: Extract 'dummy-cpus.h' header from 'system/cpus.h'
'dummy' helpers are specific to accelerator implementations,
no need to expose them via "system/cpus.h".

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Message-Id: <20250703173248.44995-27-philmd@linaro.org>
2025-07-04 12:08:44 +02:00
Philippe Mathieu-Daudé
d5a407a576 accel/whpx: Expose whpx_enabled() to common code
Currently whpx_enabled() is restricted to target-specific code.
By defining CONFIG_WHPX_IS_POSSIBLE we allow its use anywhere.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250703173248.44995-26-philmd@linaro.org>
2025-07-04 12:08:44 +02:00
Philippe Mathieu-Daudé
b6637bd556 accel/nvmm: Expose nvmm_enabled() to common code
Currently nvmm_enabled() is restricted to target-specific code.
By defining CONFIG_NVMM_IS_POSSIBLE we allow its use anywhere.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250703173248.44995-25-philmd@linaro.org>
2025-07-04 12:08:44 +02:00
Philippe Mathieu-Daudé
476e737965 accel/kvm: Remove kvm_cpu_synchronize_state() stub
Since commit 57038a92bb ("cpus: extract out kvm-specific code
to accel/kvm") the kvm_cpu_synchronize_state() stub is not
necessary.

Fixes: e0715f6abc ("kvm: remove kvm specific functions from global includes")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250703173248.44995-22-philmd@linaro.org>
2025-07-04 12:08:35 +02:00
Philippe Mathieu-Daudé
93bbbcb8d6 accel/hvf: Replace @dirty field by generic CPUState::vcpu_dirty field
No need for accel-specific @dirty field when we have
a generic one in CPUState.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250703173248.44995-19-philmd@linaro.org>
2025-07-04 12:08:25 +02:00
Philippe Mathieu-Daudé
5da232017a accel/hvf: Move generic method declarations to hvf-all.c
hvf-all.c aims to contain the generic accel methods (TYPE_ACCEL),
while hvf-accel-ops.c the per-vcpu methods (TYPE_ACCEL_OPS).

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250703173248.44995-17-philmd@linaro.org>
2025-07-04 12:08:22 +02:00
Philippe Mathieu-Daudé
c4b231cbd3 accel/hvf: Move per-cpu method declarations to hvf-accel-ops.c
hvf-all.c aims to contain the generic accel methods (TYPE_ACCEL),
while hvf-accel-ops.c the per-vcpu methods (TYPE_ACCEL_OPS).

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250703173248.44995-16-philmd@linaro.org>
2025-07-04 12:08:19 +02:00
Philippe Mathieu-Daudé
a472390e80 accel/tcg: Factor tcg_dump_stats() out for re-use
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250703173248.44995-11-philmd@linaro.org>
2025-07-04 12:08:13 +02:00
Philippe Mathieu-Daudé
04fbbeb765 accel/tcg: Factor tcg_dump_flush_info() out
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250703173248.44995-10-philmd@linaro.org>
2025-07-04 12:08:10 +02:00
Philippe Mathieu-Daudé
f1e59f012d accel/tcg: Remove profiler leftover
TCG profiler was removed in commit 1b65b4f54c.

Fixes: 1b65b4f54c ("accel/tcg: remove CONFIG_PROFILER")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250703173248.44995-9-philmd@linaro.org>
2025-07-04 12:08:07 +02:00
Philippe Mathieu-Daudé
a8e49597d4 accel/tcg: Remove 'info opcount' and @x-query-opcount
Since commit 1b65b4f54c ("accel/tcg: remove CONFIG_PROFILER",
released with QEMU v8.1.0) we get pointless output:

  (qemu) info opcount
  [TCG profiler not compiled]

Remove that unstable and unuseful command.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Dr. David Alan Gilbert <dave@treblig.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250703173248.44995-8-philmd@linaro.org>
2025-07-04 12:07:59 +02:00
Philippe Mathieu-Daudé
06810394fd accel/kvm: Reduce kvm_create_vcpu() declaration scope
kvm_create_vcpu() is only used within the same file unit.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250703173248.44995-7-philmd@linaro.org>
2025-07-04 12:02:52 +02:00
Philippe Mathieu-Daudé
f3fc87a14b accel/kvm: Remove kvm_init_cpu_signals() stub
Since commit 57038a92bb ("cpus: extract out kvm-specific code
to accel/kvm") the kvm_init_cpu_signals() stub is not necessary.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Message-Id: <20250703173248.44995-6-philmd@linaro.org>
2025-07-04 12:02:52 +02:00
Philippe Mathieu-Daudé
d30245d3f5 system/cpus: Assert interrupt handling is done with BQL locked
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20250703173248.44995-5-philmd@linaro.org>
2025-07-04 12:02:41 +02:00
Steve Sistare
7ed0919119 migration: close kvm after cpr
cpr-transfer breaks vfio network connectivity to and from the guest, and
the host system log shows:
  irq bypass consumer (token 00000000a03c32e5) registration fails: -16
which is EBUSY.  This occurs because KVM descriptors are still open in
the old QEMU process.  Close them.

Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Steve Sistare <steven.sistare@oracle.com>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Link: https://lore.kernel.org/qemu-devel/1751493538-202042-4-git-send-email-steven.sistare@oracle.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2025-07-03 13:42:28 +02:00
Stefan Hajnoczi
597639c427 Maintainer updates for June (gitlab, semihosting, plugins, virtio-gpu)
- mark s390x runner system tests as allow_fail
  - build semihosting once
  - add register write support to plugins
  - add virtual memory write support to plugins
  - add harder memory read/write support to plugins
  - add patcher plugin and tests
  - re-stock virtio-gpu MAINTAINERS
  - fix context init for Venus fences
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Merge tag 'pull-10.1-maintainer-june-2025-020725-1' of https://gitlab.com/stsquad/qemu into staging

Maintainer updates for June (gitlab, semihosting, plugins, virtio-gpu)

 - mark s390x runner system tests as allow_fail
 - build semihosting once
 - add register write support to plugins
 - add virtual memory write support to plugins
 - add harder memory read/write support to plugins
 - add patcher plugin and tests
 - re-stock virtio-gpu MAINTAINERS
 - fix context init for Venus fences

* tag 'pull-10.1-maintainer-june-2025-020725-1' of https://gitlab.com/stsquad/qemu:
  virtio-gpu: support context init multiple timeline
  MAINTAINERS: add Akihiko and Dmitry as reviewers
  MAINTAINERS: add myself to virtio-gpu for Odd Fixes
  plugins: Update plugin version and add notes
  plugins: Add patcher plugin and test
  tests/tcg: Remove copy-pasted notes and from i386 and add x86_64 system tests to tests
  plugins: Add memory hardware address read/write API
  plugins: Add memory virtual address write API
  plugins: Add enforcement of QEMU_PLUGIN_CB flags in register R/W callbacks
  plugins: Add register write API
  gdbstub: Expose gdb_write_register function to consumers of gdbstub
  semihosting/uaccess: Compile once
  semihosting/uaccess: Remove uses of target_ulong type
  tests/functional: Add PCI hotplug test for aarch64
  gitlab: mark s390x-system to allow failures

Conflicts:
  tests/functional/meson.build

  Context conflict with commit 7bc86ccbb5 ("tests/functional: test
  device passthrough on aarch64"), keep both changes to
  tests_aarch64_system_thorough[].
2025-07-03 05:58:56 -04:00
Rowan Hart
766e00bd57 plugins: Add enforcement of QEMU_PLUGIN_CB flags in register R/W callbacks
This patch adds functionality to enforce the requested QEMU_PLUGIN_CB_
flags level passed when registering a callback function using the
plugins API. Each time a callback is about to be invoked, a thread-local
variable will be updated with the level that callback requested. Then,
called API functions (in particular, the register read and write API)
will call qemu_plugin_get_cb_flags() to check the level is at least the
level they require.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Rowan Hart <rowanbhart@gmail.com>
Message-ID: <20250624175351.440780-4-rowanbhart@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-ID: <20250627112512.1880708-8-alex.bennee@linaro.org>
2025-07-02 10:09:48 +01:00
Philippe Mathieu-Daudé
d17d5cc0d6 accel/hvf: Trace VM memory mapping
Trace memory mapped / unmapped in the guest.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250623121845.7214-8-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-07-01 15:08:33 +01:00
Chenyi Qiang
2fde3fb916 physmem: Support coordinated discarding of RAM with guest_memfd
A new field, attributes, was introduced in RAMBlock to link to a
RamBlockAttributes object, which centralizes all guest_memfd related
information (such as fd and status bitmap) within a RAMBlock.

Create and initialize the RamBlockAttributes object upon ram_block_add().
Meanwhile, register the object in the target RAMBlock's MemoryRegion.
After that, guest_memfd-backed RAMBlock is associated with the
RamDiscardManager interface, and the users can execute RamDiscardManager
specific handling. For example, VFIO will register the
RamDiscardListener and get notifications when the state_change() helper
invokes.

As coordinate discarding of RAM with guest_memfd is now supported, only
block uncoordinated discard.

Tested-by: Alexey Kardashevskiy <aik@amd.com>
Reviewed-by: Alexey Kardashevskiy <aik@amd.com>
Acked-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Chenyi Qiang <chenyi.qiang@intel.com>
Link: https://lore.kernel.org/r/20250612082747.51539-6-chenyi.qiang@intel.com
Signed-off-by: Peter Xu <peterx@redhat.com>
2025-06-23 16:03:59 -04:00
Philippe Mathieu-Daudé
6cfe590c6b accel/hvf: Fix TYPE_HVF_ACCEL instance size
Fixes: c97d6d2cdf ("i386: hvf: add code base from Google repo")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250606164418.98655-7-philmd@linaro.org>
2025-06-10 12:59:09 +02:00
Tom Lendacky
4cdc489eb9 i386/kvm: Prefault memory on page state change
A page state change is typically followed by an access of the page(s) and
results in another VMEXIT in order to map the page into the nested page
table. Depending on the size of page state change request, this can
generate a number of additional VMEXITs. For example, under SNP, when
Linux is utilizing lazy memory acceptance, memory is typically accepted in
4M chunks. A page state change request is submitted to mark the pages as
private, followed by validation of the memory. Since the guest_memfd
currently only supports 4K pages, each page validation will result in
VMEXIT to map the page, resulting in 1024 additional exits.

When performing a page state change, invoke KVM_PRE_FAULT_MEMORY for the
size of the page state change in order to pre-map the pages and avoid the
additional VMEXITs. This helps speed up boot times.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Link: https://lore.kernel.org/r/f5411c42340bd2f5c14972551edb4e959995e42b.1743193824.git.thomas.lendacky@amd.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-06-06 14:32:54 +02:00
Stefan Hajnoczi
98721058d6 * target/i386/kvm: Intel TDX support
* target/i386/emulate: more lflags cleanups
 * meson: remove need for explicit listing of dependencies in hw_common_arch and
   target_common_arch
 * rust: small fixes
 * hpet: Reorganize register decoding to be more similar to Rust code
 * target/i386: fixes for AMD models
 * target/i386: new EPYC-Turin CPU model
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Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* target/i386/kvm: Intel TDX support
* target/i386/emulate: more lflags cleanups
* meson: remove need for explicit listing of dependencies in hw_common_arch and
  target_common_arch
* rust: small fixes
* hpet: Reorganize register decoding to be more similar to Rust code
* target/i386: fixes for AMD models
* target/i386: new EPYC-Turin CPU model

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# gpg: Signature made Thu 29 May 2025 03:05:00 EDT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (77 commits)
  target/i386/tcg/helper-tcg: fix file references in comments
  target/i386: Add support for EPYC-Turin model
  target/i386: Update EPYC-Genoa for Cache property, perfmon-v2, RAS and SVM feature bits
  target/i386: Add couple of feature bits in CPUID_Fn80000021_EAX
  target/i386: Update EPYC-Milan CPU model for Cache property, RAS, SVM feature bits
  target/i386: Update EPYC-Rome CPU model for Cache property, RAS, SVM feature bits
  target/i386: Update EPYC CPU model for Cache property, RAS, SVM feature bits
  rust: make declaration of dependent crates more consistent
  docs: Add TDX documentation
  i386/tdx: Validate phys_bits against host value
  i386/tdx: Make invtsc default on
  i386/tdx: Don't treat SYSCALL as unavailable
  i386/tdx: Fetch and validate CPUID of TD guest
  target/i386: Print CPUID subleaf info for unsupported feature
  i386: Remove unused parameter "uint32_t bit" in feature_word_description()
  i386/cgs: Introduce x86_confidential_guest_check_features()
  i386/tdx: Define supported KVM features for TDX
  i386/tdx: Add XFD to supported bit of TDX
  i386/tdx: Add supported CPUID bits relates to XFAM
  i386/tdx: Add supported CPUID bits related to TD Attributes
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-05-30 11:41:07 -04:00
Xiaoyao Li
b4b7fb5a77 cpu: Don't set vcpu_dirty when guest_state_protected
QEMU calls kvm_arch_put_registers() when vcpu_dirty is true in
kvm_vcpu_exec(). However, for confidential guest, like TDX, putting
registers is disallowed due to guest state is protected.

Only set vcpu_dirty to true with guest state is not protected when
creating the vcpu.

Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250508150002.689633-43-xiaoyao.li@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-05-28 19:35:54 +02:00
Xiaoyao Li
77b5403a02 kvm: Check KVM_CAP_MAX_VCPUS at vm level
KVM with TDX support starts to report different KVM_CAP_MAX_VCPUS per
different VM types. So switch to check the KVM_CAP_MAX_VCPUS at vm level.

KVM still returns the global KVM_CAP_MAX_VCPUS when the KVM is old that
doesn't report different value at vm level.

Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250508150002.689633-31-xiaoyao.li@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-05-28 19:35:54 +02:00
Xiaoyao Li
a668268dc0 kvm: Introduce kvm_arch_pre_create_vcpu()
Introduce kvm_arch_pre_create_vcpu(), to perform arch-dependent
work prior to create any vcpu. This is for i386 TDX because it needs
call TDX_INIT_VM before creating any vcpu.

The specific implementation for i386 will be added in the future patch.

Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250508150002.689633-8-xiaoyao.li@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-05-28 19:01:40 +02:00
Richard Henderson
5c2891601c accel/tcg: Assert TCGCPUOps.pointer_wrap is set
All targets now provide the function, so we can
make the call unconditional.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-28 08:08:48 +01:00
Richard Henderson
981f2beb16 target: Use cpu_pointer_wrap_uint32 for 32-bit targets
M68K, MicroBlaze, OpenRISC, RX, TriCore and Xtensa are
all 32-bit targets.  AVR is more complicated, but using
a 32-bit wrap preserves current behaviour.

Cc: Michael Rolnik <mrolnik@gmail.com>
Cc: Laurent Vivier <laurent@vivier.eu>
Cc: Stafford Horne <shorne@gmail.com>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Tested-by Bastian Koppelmann <kbastian@mail.uni-paderborn.de> (tricore)
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-28 08:08:48 +01:00
Richard Henderson
a4027ed7d4 target: Use cpu_pointer_wrap_notreached for strict align targets
Alpha, HPPA, and SH4 always use aligned addresses,
and therefore never produce accesses that cross pages.

Cc: Helge Deller <deller@gmx.de>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-28 08:08:47 +01:00
Richard Henderson
bdf26b5d16 accel/tcg: Add TCGCPUOps.pointer_wrap
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-28 08:08:47 +01:00
Richard Henderson
11efde54f2 tcg: Drop TCGContext.page_{mask,bits}
Use exec/target_page.h instead of independent variables.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-28 08:08:47 +01:00
Richard Henderson
9cfcf8c3b7 tcg: Drop TCGContext.tlb_dyn_max_bits
This was an extremely minor optimization for aarch64
and x86_64, to use a 32-bit AND instruction when the
guest softmmu tlb maximum was sufficiently small.
Both hosts can simply use a 64-bit AND insn instead.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-28 08:08:47 +01:00
Richard Henderson
319b0c8d07 accel/tcg: Fix atomic_mmu_lookup vs TLB_FORCE_SLOW
When we moved TLB_MMIO and TLB_DISCARD_WRITE to TLB_SLOW_FLAGS_MASK,
we failed to update atomic_mmu_lookup to properly reconstruct flags.

Fixes: 24b5e0fdb5 ("include/exec: Move TLB_MMIO, TLB_DISCARD_WRITE to slow flags")
Reported-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Tested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-28 08:07:49 +01:00
Pierrick Bouvier
d33717d7fc meson: remove lib{system, user}_ss aliases
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link: https://lore.kernel.org/r/20250521223414.248276-7-pierrick.bouvier@linaro.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-05-26 17:31:06 +02:00
Paolo Bonzini
e3c426cb78 meson: do not check supported TCG architecture if no emulators built
Errors about TCI are pointless if only tools are being built; suppress
them even if the user did not specify --disable-tcg.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-05-12 16:08:24 +02:00
Philippe Mathieu-Daudé
962f9f18d2 system/hvf: Expose hvf_enabled() to common code
Currently hvf_enabled() is restricted to target-specific code.
By defining CONFIG_HVF_IS_POSSIBLE we allow its use anywhere.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250403235821.9909-28-philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-08 14:22:12 +02:00
Philippe Mathieu-Daudé
b3b3ad22c8 accel/hvf: Include missing 'hw/core/cpu.h' header
Since commit d5bd8d8267 ("hvf: only update sysreg from owning
thread") hvf-all.c accesses the run_on_cpu_data type and calls
run_on_cpu(), both defined in the "hw/core/cpu.h" header.
Fortunately, it is indirectly included via:

  "system/hvf.h"
    -> "target/arm/cpu.h"
         -> "target/arm/cpu-qom.h"
              -> "hw/core/cpu.h"

"system/hvf.h" however doesn't need "target/arm/cpu.h" and we
want to remove it there. In order to do that we first need to
include it in hvf-all.c, otherwise we get:

  ../accel/hvf/hvf-all.c:61:54: error: unknown type name 'run_on_cpu_data'
   61 | static void do_hvf_update_guest_debug(CPUState *cpu, run_on_cpu_data arg)
      |                                                      ^
  ../accel/hvf/hvf-all.c:68:5: error: call to undeclared function 'run_on_cpu'
   68 |     run_on_cpu(cpu, do_hvf_update_guest_debug, RUN_ON_CPU_NULL);
      |     ^
  ../accel/hvf/hvf-all.c:68:48: error: use of undeclared identifier 'RUN_ON_CPU_NULL'
   68 |     run_on_cpu(cpu, do_hvf_update_guest_debug, RUN_ON_CPU_NULL);
      |                                                ^

Cc: Mads Ynddal <m.ynddal@samsung.com>
Reported-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Mads Ynddal <mads@ynddal.dk>
Message-Id: <20250507204401.45379-1-philmd@linaro.org>
2025-05-08 14:22:12 +02:00
Stefan Hajnoczi
57b6f8d07f target-arm queue:
* hw/arm/npcm8xx_boards: Correct valid_cpu_types setting of NPCM8XX SoC
  * arm/hvf: fix crashes when using gdbstub
  * target/arm/ptw: fix arm_cpu_get_phys_page_attrs_debug
  * hw/arm/virt: Remove deprecated old versions of 'virt' machine
  * tests/functional: Add test for imx8mp-evk board with USDHC coverage
  * hw/arm: Attach PSPI module to NPCM8XX SoC
  * target/arm: Don't assert() for ISB/SB inside IT block
  * docs: Don't define duplicate label in qemu-block-drivers.rst.inc
  * target/arm/kvm: Drop support for kernels without KVM_ARM_PREFERRED_TARGET
  * hw/pci-host/designware: Fix viewport configuration
  * hw/gpio/imx_gpio: Fix interpretation of GDIR polarity
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Merge tag 'pull-target-arm-20250506' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * hw/arm/npcm8xx_boards: Correct valid_cpu_types setting of NPCM8XX SoC
 * arm/hvf: fix crashes when using gdbstub
 * target/arm/ptw: fix arm_cpu_get_phys_page_attrs_debug
 * hw/arm/virt: Remove deprecated old versions of 'virt' machine
 * tests/functional: Add test for imx8mp-evk board with USDHC coverage
 * hw/arm: Attach PSPI module to NPCM8XX SoC
 * target/arm: Don't assert() for ISB/SB inside IT block
 * docs: Don't define duplicate label in qemu-block-drivers.rst.inc
 * target/arm/kvm: Drop support for kernels without KVM_ARM_PREFERRED_TARGET
 * hw/pci-host/designware: Fix viewport configuration
 * hw/gpio/imx_gpio: Fix interpretation of GDIR polarity

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# gpg: Signature made Tue 06 May 2025 10:41:33 EDT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20250506' of https://git.linaro.org/people/pmaydell/qemu-arm: (32 commits)
  hw/arm/virt: Remove deprecated virt-4.0 machine
  hw/arm/virt: Remove deprecated virt-3.1 machine
  hw/arm/virt: Remove deprecated virt-3.0 machine
  hw/arm/virt: Update comment about Multiprocessor Affinity Register
  hw/gpio/imx_gpio: Fix interpretation of GDIR polarity
  hw/pci-host/designware: Fix viewport configuration
  hw/pci-host/designware: Remove unused include
  target/arm/kvm: Drop support for kernels without KVM_ARM_PREFERRED_TARGET
  docs: Don't define duplicate label in qemu-block-drivers.rst.inc
  target/arm: Don't assert() for ISB/SB inside IT block
  hw/arm: Attach PSPI module to NPCM8XX SoC
  tests/functional: Add test for imx8mp-evk board with USDHC coverage
  hw/arm/virt: Remove VirtMachineClass::no_highmem_ecam field
  hw/arm/virt: Remove deprecated virt-2.12 machine
  hw/arm/virt: Remove VirtMachineClass::smbios_old_sys_ver field
  hw/arm/virt: Remove deprecated virt-2.11 machine
  hw/arm/virt: Remove deprecated virt-2.10 machine
  hw/arm/virt: Remove deprecated virt-2.9 machine
  hw/arm/virt: Remove VirtMachineClass::claim_edge_triggered_timers field
  hw/arm/virt: Remove deprecated virt-2.8 machine
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-05-07 14:28:20 -04:00
Mads Ynddal
d5bd8d8267 hvf: only update sysreg from owning thread
hv_vcpu_set_sys_reg should only be called from the owning thread of the
vCPU, so to avoid crashes, the call to hvf_update_guest_debug is
dispatched to the individual threads.

Tested-by: Daniel Gomez <da.gomez@samsung.com>
Signed-off-by: Mads Ynddal <m.ynddal@samsung.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20250402135229.28143-3-mads@ynddal.dk
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-05-06 15:01:22 +01:00
Richard Henderson
768cb76d14 accel/tcg: Build user-exec.c once
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-05 09:24:10 -07:00
Richard Henderson
03c981e7d6 accel/tcg: Avoid abi_ptr in user-exec.c
In page_dump/dump_region, use guest_addr_max to check the
size of the guest address space and size the output
appropriately.  This will change output with small values
of -R reserved_va, but shouldn't affect anything else.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-05-05 09:24:10 -07:00