mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-17 15:12:07 -06:00
hw/intc/loongarch_pch: Change default irq number of pch irq controller
Change the default irq number of pch pic to 32, so that the irq number of pch msi is 224(256 - 32), and move the 'PCH_PIC_IRQ_NUM' macro to pci-host/ls7a.h and add prefix 'VIRT' on it to keep standard format. Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230104020518.2564263-4-zhaotianrui@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
This commit is contained in:
parent
270950b49d
commit
f4d10ce8aa
5 changed files with 7 additions and 6 deletions
|
@ -9,6 +9,7 @@
|
||||||
#include "qemu/bitops.h"
|
#include "qemu/bitops.h"
|
||||||
#include "hw/sysbus.h"
|
#include "hw/sysbus.h"
|
||||||
#include "hw/loongarch/virt.h"
|
#include "hw/loongarch/virt.h"
|
||||||
|
#include "hw/pci-host/ls7a.h"
|
||||||
#include "hw/irq.h"
|
#include "hw/irq.h"
|
||||||
#include "hw/intc/loongarch_pch_pic.h"
|
#include "hw/intc/loongarch_pch_pic.h"
|
||||||
#include "hw/qdev-properties.h"
|
#include "hw/qdev-properties.h"
|
||||||
|
@ -377,7 +378,7 @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
|
||||||
{
|
{
|
||||||
LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev);
|
LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev);
|
||||||
|
|
||||||
if (!s->irq_num || s->irq_num > PCH_PIC_IRQ_NUM) {
|
if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) {
|
||||||
error_setg(errp, "Invalid 'pic_irq_num'");
|
error_setg(errp, "Invalid 'pic_irq_num'");
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
|
@ -616,7 +616,7 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
|
||||||
}
|
}
|
||||||
|
|
||||||
pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC);
|
pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC);
|
||||||
num = PCH_PIC_IRQ_NUM;
|
num = VIRT_PCH_PIC_IRQ_NUM;
|
||||||
qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
|
qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
|
||||||
d = SYS_BUS_DEVICE(pch_pic);
|
d = SYS_BUS_DEVICE(pch_pic);
|
||||||
sysbus_realize_and_unref(d, &error_fatal);
|
sysbus_realize_and_unref(d, &error_fatal);
|
||||||
|
|
|
@ -8,10 +8,10 @@
|
||||||
#define TYPE_LOONGARCH_PCH_MSI "loongarch_pch_msi"
|
#define TYPE_LOONGARCH_PCH_MSI "loongarch_pch_msi"
|
||||||
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHMSI, LOONGARCH_PCH_MSI)
|
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHMSI, LOONGARCH_PCH_MSI)
|
||||||
|
|
||||||
/* Msi irq start start from 64 to 255 */
|
/* MSI irq start from 32 to 255 */
|
||||||
#define PCH_MSI_IRQ_START 64
|
#define PCH_MSI_IRQ_START 32
|
||||||
#define PCH_MSI_IRQ_END 255
|
#define PCH_MSI_IRQ_END 255
|
||||||
#define PCH_MSI_IRQ_NUM 192
|
#define PCH_MSI_IRQ_NUM 224
|
||||||
|
|
||||||
struct LoongArchPCHMSI {
|
struct LoongArchPCHMSI {
|
||||||
SysBusDevice parent_obj;
|
SysBusDevice parent_obj;
|
||||||
|
|
|
@ -9,7 +9,6 @@
|
||||||
#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
|
#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
|
||||||
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
|
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
|
||||||
|
|
||||||
#define PCH_PIC_IRQ_NUM 64
|
|
||||||
#define PCH_PIC_INT_ID_VAL 0x7000000UL
|
#define PCH_PIC_INT_ID_VAL 0x7000000UL
|
||||||
#define PCH_PIC_INT_ID_VER 0x1UL
|
#define PCH_PIC_INT_ID_VER 0x1UL
|
||||||
|
|
||||||
|
|
|
@ -32,6 +32,7 @@
|
||||||
* 0 ~ 16 irqs used for non-pci device while 16 ~ 64 irqs
|
* 0 ~ 16 irqs used for non-pci device while 16 ~ 64 irqs
|
||||||
* used for pci device.
|
* used for pci device.
|
||||||
*/
|
*/
|
||||||
|
#define VIRT_PCH_PIC_IRQ_NUM 32
|
||||||
#define PCH_PIC_IRQ_OFFSET 64
|
#define PCH_PIC_IRQ_OFFSET 64
|
||||||
#define VIRT_DEVICE_IRQS 16
|
#define VIRT_DEVICE_IRQS 16
|
||||||
#define VIRT_UART_IRQ (PCH_PIC_IRQ_OFFSET + 2)
|
#define VIRT_UART_IRQ (PCH_PIC_IRQ_OFFSET + 2)
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue