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tcg/i386: Drop addrhi from prepare_host_addr

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The guest address will now always fit in one register.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2025-02-04 17:36:35 -08:00
parent d9a8889f6d
commit dc8e2f8f78
1 changed files with 20 additions and 36 deletions
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56
tcg/i386/tcg-target.c.inc
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@ -2169,8 +2169,7 @@ static inline int setup_guest_base_seg(void)
* is required and fill in @h with the host address for the fast path. * is required and fill in @h with the host address for the fast path.
*/ */
static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h, static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
TCGReg addrlo, TCGReg addrhi, TCGReg addr, MemOpIdx oi, bool is_ld)
MemOpIdx oi, bool is_ld)
{ {
TCGLabelQemuLdst *ldst = NULL; TCGLabelQemuLdst *ldst = NULL;
MemOp opc = get_memop(oi); MemOp opc = get_memop(oi);
@ -2184,7 +2183,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
} else { } else {
*h = x86_guest_base; *h = x86_guest_base;
} }
h->base = addrlo; h->base = addr;
h->aa = atom_and_align_for_opc(s, opc, MO_ATOM_IFALIGN, s_bits == MO_128); h->aa = atom_and_align_for_opc(s, opc, MO_ATOM_IFALIGN, s_bits == MO_128);
a_mask = (1 << h->aa.align) - 1; a_mask = (1 << h->aa.align) - 1;
@ -2202,8 +2201,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
ldst = new_ldst_label(s); ldst = new_ldst_label(s);
ldst->is_ld = is_ld; ldst->is_ld = is_ld;
ldst->oi = oi; ldst->oi = oi;
ldst->addrlo_reg = addrlo; ldst->addrlo_reg = addr;
ldst->addrhi_reg = addrhi;
if (TCG_TARGET_REG_BITS == 64) { if (TCG_TARGET_REG_BITS == 64) {
ttype = s->addr_type; ttype = s->addr_type;
@ -2217,7 +2215,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
} }
} }
tcg_out_mov(s, tlbtype, TCG_REG_L0, addrlo); tcg_out_mov(s, tlbtype, TCG_REG_L0, addr);
tcg_out_shifti(s, SHIFT_SHR + tlbrexw, TCG_REG_L0, tcg_out_shifti(s, SHIFT_SHR + tlbrexw, TCG_REG_L0,
s->page_bits - CPU_TLB_ENTRY_BITS); s->page_bits - CPU_TLB_ENTRY_BITS);
@ -2233,10 +2231,10 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
* check that we don't cross pages for the complete access. * check that we don't cross pages for the complete access.
*/ */
if (a_mask >= s_mask) { if (a_mask >= s_mask) {
tcg_out_mov(s, ttype, TCG_REG_L1, addrlo); tcg_out_mov(s, ttype, TCG_REG_L1, addr);
} else { } else {
tcg_out_modrm_offset(s, OPC_LEA + trexw, TCG_REG_L1, tcg_out_modrm_offset(s, OPC_LEA + trexw, TCG_REG_L1,
addrlo, s_mask - a_mask); addr, s_mask - a_mask);
} }
tlb_mask = s->page_mask | a_mask; tlb_mask = s->page_mask | a_mask;
tgen_arithi(s, ARITH_AND + trexw, TCG_REG_L1, tlb_mask, 0); tgen_arithi(s, ARITH_AND + trexw, TCG_REG_L1, tlb_mask, 0);
@ -2250,17 +2248,6 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
ldst->label_ptr[0] = s->code_ptr; ldst->label_ptr[0] = s->code_ptr;
s->code_ptr += 4; s->code_ptr += 4;
if (TCG_TARGET_REG_BITS == 32 && s->addr_type == TCG_TYPE_I64) {
/* cmp 4(TCG_REG_L0), addrhi */
tcg_out_modrm_offset(s, OPC_CMP_GvEv, addrhi,
TCG_REG_L0, cmp_ofs + 4);
/* jne slow_path */
tcg_out_opc(s, OPC_JCC_long + JCC_JNE, 0, 0, 0);
ldst->label_ptr[1] = s->code_ptr;
s->code_ptr += 4;
}
/* TLB Hit. */ /* TLB Hit. */
tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_L0, TCG_REG_L0, tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_L0, TCG_REG_L0,
offsetof(CPUTLBEntry, addend)); offsetof(CPUTLBEntry, addend));
@ -2270,11 +2257,10 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
ldst = new_ldst_label(s); ldst = new_ldst_label(s);
ldst->is_ld = is_ld; ldst->is_ld = is_ld;
ldst->oi = oi; ldst->oi = oi;
ldst->addrlo_reg = addrlo; ldst->addrlo_reg = addr;
ldst->addrhi_reg = addrhi;
/* jne slow_path */ /* jne slow_path */
jcc = tcg_out_cmp(s, TCG_COND_TSTNE, addrlo, a_mask, true, false); jcc = tcg_out_cmp(s, TCG_COND_TSTNE, addr, a_mask, true, false);
tcg_out_opc(s, OPC_JCC_long + jcc, 0, 0, 0); tcg_out_opc(s, OPC_JCC_long + jcc, 0, 0, 0);
ldst->label_ptr[0] = s->code_ptr; ldst->label_ptr[0] = s->code_ptr;
s->code_ptr += 4; s->code_ptr += 4;
@ -2446,13 +2432,12 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
} }
static void tcg_out_qemu_ld(TCGContext *s, TCGReg datalo, TCGReg datahi, static void tcg_out_qemu_ld(TCGContext *s, TCGReg datalo, TCGReg datahi,
TCGReg addrlo, TCGReg addrhi, TCGReg addr, MemOpIdx oi, TCGType data_type)
MemOpIdx oi, TCGType data_type)
{ {
TCGLabelQemuLdst *ldst; TCGLabelQemuLdst *ldst;
HostAddress h; HostAddress h;
ldst = prepare_host_addr(s, &h, addrlo, addrhi, oi, true); ldst = prepare_host_addr(s, &h, addr, oi, true);
tcg_out_qemu_ld_direct(s, datalo, datahi, h, data_type, get_memop(oi)); tcg_out_qemu_ld_direct(s, datalo, datahi, h, data_type, get_memop(oi));
if (ldst) { if (ldst) {
@ -2574,13 +2559,12 @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
} }
static void tcg_out_qemu_st(TCGContext *s, TCGReg datalo, TCGReg datahi, static void tcg_out_qemu_st(TCGContext *s, TCGReg datalo, TCGReg datahi,
TCGReg addrlo, TCGReg addrhi, TCGReg addr, MemOpIdx oi, TCGType data_type)
MemOpIdx oi, TCGType data_type)
{ {
TCGLabelQemuLdst *ldst; TCGLabelQemuLdst *ldst;
HostAddress h; HostAddress h;
ldst = prepare_host_addr(s, &h, addrlo, addrhi, oi, false); ldst = prepare_host_addr(s, &h, addr, oi, false);
tcg_out_qemu_st_direct(s, datalo, datahi, h, get_memop(oi)); tcg_out_qemu_st_direct(s, datalo, datahi, h, get_memop(oi));
if (ldst) { if (ldst) {
@ -2880,34 +2864,34 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type,
break; break;
case INDEX_op_qemu_ld_i32: case INDEX_op_qemu_ld_i32:
tcg_out_qemu_ld(s, a0, -1, a1, -1, a2, TCG_TYPE_I32); tcg_out_qemu_ld(s, a0, -1, a1, a2, TCG_TYPE_I32);
break; break;
case INDEX_op_qemu_ld_i64: case INDEX_op_qemu_ld_i64:
if (TCG_TARGET_REG_BITS == 64) { if (TCG_TARGET_REG_BITS == 64) {
tcg_out_qemu_ld(s, a0, -1, a1, -1, a2, TCG_TYPE_I64); tcg_out_qemu_ld(s, a0, -1, a1, a2, TCG_TYPE_I64);
} else { } else {
tcg_out_qemu_ld(s, a0, a1, a2, -1, args[3], TCG_TYPE_I64); tcg_out_qemu_ld(s, a0, a1, a2, args[3], TCG_TYPE_I64);
} }
break; break;
case INDEX_op_qemu_ld_i128: case INDEX_op_qemu_ld_i128:
tcg_debug_assert(TCG_TARGET_REG_BITS == 64); tcg_debug_assert(TCG_TARGET_REG_BITS == 64);
tcg_out_qemu_ld(s, a0, a1, a2, -1, args[3], TCG_TYPE_I128); tcg_out_qemu_ld(s, a0, a1, a2, args[3], TCG_TYPE_I128);
break; break;
case INDEX_op_qemu_st_i32: case INDEX_op_qemu_st_i32:
case INDEX_op_qemu_st8_i32: case INDEX_op_qemu_st8_i32:
tcg_out_qemu_st(s, a0, -1, a1, -1, a2, TCG_TYPE_I32); tcg_out_qemu_st(s, a0, -1, a1, a2, TCG_TYPE_I32);
break; break;
case INDEX_op_qemu_st_i64: case INDEX_op_qemu_st_i64:
if (TCG_TARGET_REG_BITS == 64) { if (TCG_TARGET_REG_BITS == 64) {
tcg_out_qemu_st(s, a0, -1, a1, -1, a2, TCG_TYPE_I64); tcg_out_qemu_st(s, a0, -1, a1, a2, TCG_TYPE_I64);
} else { } else {
tcg_out_qemu_st(s, a0, a1, a2, -1, args[3], TCG_TYPE_I64); tcg_out_qemu_st(s, a0, a1, a2, args[3], TCG_TYPE_I64);
} }
break; break;
case INDEX_op_qemu_st_i128: case INDEX_op_qemu_st_i128:
tcg_debug_assert(TCG_TARGET_REG_BITS == 64); tcg_debug_assert(TCG_TARGET_REG_BITS == 64);
tcg_out_qemu_st(s, a0, a1, a2, -1, args[3], TCG_TYPE_I128); tcg_out_qemu_st(s, a0, a1, a2, args[3], TCG_TYPE_I128);
break; break;
OP_32_64(mulu2): OP_32_64(mulu2):