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tcg: Convert sar to TCGOutOpBinary
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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74dbd36f1f
commit
b5aafbaa83
11 changed files with 230 additions and 164 deletions
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@ -1908,6 +1908,29 @@ static const TCGOutOpBinary outop_remu = {
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.out_rrr = tgen_remu,
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};
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static void tgen_sar(TCGContext *s, TCGType type,
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TCGReg a0, TCGReg a1, TCGReg a2)
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{
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MIPSInsn insn = type == TCG_TYPE_I32 ? OPC_SRAV : OPC_DSRAV;
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tcg_out_opc_reg(s, insn, a0, a1, a2);
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}
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static void tgen_sari(TCGContext *s, TCGType type,
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TCGReg a0, TCGReg a1, tcg_target_long a2)
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{
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if (type == TCG_TYPE_I32) {
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tcg_out_opc_sa(s, OPC_SRA, a0, a1, a2);
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} else {
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tcg_out_dsra(s, a0, a1, a2);
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}
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}
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static const TCGOutOpBinary outop_sar = {
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.base.static_constraint = C_O1_I2(r, r, ri),
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.out_rrr = tgen_sar,
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.out_rri = tgen_sari,
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};
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static void tgen_shl(TCGContext *s, TCGType type,
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TCGReg a0, TCGReg a1, TCGReg a2)
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{
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@ -2111,12 +2134,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type,
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tcg_out_dsra(s, a0, a1, 32);
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break;
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case INDEX_op_sar_i32:
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i1 = OPC_SRAV, i2 = OPC_SRA;
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goto do_shift;
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case INDEX_op_rotr_i32:
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i1 = OPC_ROTRV, i2 = OPC_ROTR;
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do_shift:
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if (c2) {
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tcg_out_opc_sa(s, i2, a0, a1, a2);
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break;
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@ -2132,13 +2151,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type,
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tcg_out_opc_reg(s, OPC_ROTRV, a0, TCG_TMP0, a1);
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}
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break;
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case INDEX_op_sar_i64:
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if (c2) {
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tcg_out_dsra(s, a0, a1, a2);
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break;
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}
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i1 = OPC_DSRAV;
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goto do_shiftv;
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case INDEX_op_rotr_i64:
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if (c2) {
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tcg_out_opc_sa64(s, OPC_DROTR, OPC_DROTR32, a0, a1, a2);
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@ -2319,10 +2331,8 @@ tcg_target_op_def(TCGOpcode op, TCGType type, unsigned flags)
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case INDEX_op_muls2_i64:
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case INDEX_op_mulu2_i64:
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return C_O2_I2(r, r, r, r);
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case INDEX_op_sar_i32:
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case INDEX_op_rotr_i32:
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case INDEX_op_rotl_i32:
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case INDEX_op_sar_i64:
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case INDEX_op_rotr_i64:
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case INDEX_op_rotl_i64:
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return C_O1_I2(r, r, ri);
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