motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-05 16:53:55 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

hw/cxl/cxl-mailbox-utils: CXL CCI Get/Set alert config commands

Browse source 
1) get alert configuration(Opcode 4201h)
2) set alert configuration(Opcode 4202h)

Signed-off-by: Sweta Kumari <s5.kumari@samsung.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20250305092501.191929-7-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Sweta Kumari 2025-03-05 09:24:57 +00:00 • committed by Michael S. Tsirkin
parent 40ab4ed107
commit a3e0b1ff37
3 changed files with 134 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

15
include/hw/cxl/cxl_device.h
View file

@ -542,6 +542,19 @@ typedef struct CXLSetFeatureInfo {
struct CXLSanitizeInfo;
typedef struct CXLAlertConfig {
uint8_t valid_alerts;
uint8_t enable_alerts;
uint8_t life_used_crit_alert_thresh;
uint8_t life_used_warn_thresh;
uint16_t over_temp_crit_alert_thresh;
uint16_t under_temp_crit_alert_thresh;
uint16_t over_temp_warn_thresh;
uint16_t under_temp_warn_thresh;
uint16_t cor_vmem_err_warn_thresh;
uint16_t cor_pmem_err_warn_thresh;
} QEMU_PACKED CXLAlertConfig;
struct CXLType3Dev {
/* Private */
PCIDevice parent_obj;
@ -563,6 +576,8 @@ struct CXLType3Dev {
CXLCCI vdm_fm_owned_ld_mctp_cci;
CXLCCI ld0_cci;
CXLAlertConfig alert_config;
/* PCIe link characteristics */
PCIExpLinkSpeed speed;
PCIExpLinkWidth width;