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hw/cxl/cxl-mailbox-utils: Media operations Sanitize and Write Zeros commands CXL r3.2(8.2.10.9.5.3)
CXL spec 3.2 section 8.2.10.9.5.3 describes media operations commands. CXL devices supports media operations Sanitize and Write zero command. Signed-off-by: Vinayak Holikatti <vinayak.kh@samsung.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20250305092501.191929-6-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Vinayak Holikatti
Michael S. Tsirkin
parent
484df0704e
commit
40ab4ed107
2 changed files with 208 additions and 0 deletions
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@ -1715,6 +1715,131 @@ static CXLRetCode cmd_sanitize_overwrite(const struct cxl_cmd *cmd,
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return CXL_MBOX_BG_STARTED;
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}
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struct dpa_range_list_entry {
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uint64_t starting_dpa;
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uint64_t length;
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} QEMU_PACKED;
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struct CXLSanitizeInfo {
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uint32_t dpa_range_count;
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uint8_t fill_value;
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struct dpa_range_list_entry dpa_range_list[];
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} QEMU_PACKED;
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static uint64_t get_vmr_size(CXLType3Dev *ct3d, MemoryRegion **vmr)
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{
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MemoryRegion *mr;
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if (ct3d->hostvmem) {
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mr = host_memory_backend_get_memory(ct3d->hostvmem);
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if (vmr) {
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*vmr = mr;
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}
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return memory_region_size(mr);
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}
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return 0;
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}
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static uint64_t get_pmr_size(CXLType3Dev *ct3d, MemoryRegion **pmr)
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{
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MemoryRegion *mr;
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if (ct3d->hostpmem) {
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mr = host_memory_backend_get_memory(ct3d->hostpmem);
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if (pmr) {
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*pmr = mr;
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}
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return memory_region_size(mr);
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}
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return 0;
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}
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static uint64_t get_dc_size(CXLType3Dev *ct3d, MemoryRegion **dc_mr)
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{
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MemoryRegion *mr;
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if (ct3d->dc.host_dc) {
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mr = host_memory_backend_get_memory(ct3d->dc.host_dc);
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if (dc_mr) {
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*dc_mr = mr;
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}
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return memory_region_size(mr);
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}
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return 0;
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}
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static int validate_dpa_addr(CXLType3Dev *ct3d, uint64_t dpa_addr,
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size_t length)
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{
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uint64_t vmr_size, pmr_size, dc_size;
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if ((dpa_addr % CXL_CACHE_LINE_SIZE) ||
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(length % CXL_CACHE_LINE_SIZE) ||
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(length <= 0)) {
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return -EINVAL;
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}
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vmr_size = get_vmr_size(ct3d, NULL);
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pmr_size = get_pmr_size(ct3d, NULL);
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dc_size = get_dc_size(ct3d, NULL);
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if (dpa_addr + length > vmr_size + pmr_size + dc_size) {
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return -EINVAL;
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}
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if (dpa_addr > vmr_size + pmr_size) {
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if (!ct3_test_region_block_backed(ct3d, dpa_addr, length)) {
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return -ENODEV;
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}
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}
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return 0;
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}
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static int sanitize_range(CXLType3Dev *ct3d, uint64_t dpa_addr, size_t length,
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uint8_t fill_value)
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{
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uint64_t vmr_size, pmr_size;
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AddressSpace *as = NULL;
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MemTxAttrs mem_attrs = {};
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vmr_size = get_vmr_size(ct3d, NULL);
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pmr_size = get_pmr_size(ct3d, NULL);
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if (dpa_addr < vmr_size) {
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as = &ct3d->hostvmem_as;
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} else if (dpa_addr < vmr_size + pmr_size) {
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as = &ct3d->hostpmem_as;
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} else {
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if (!ct3_test_region_block_backed(ct3d, dpa_addr, length)) {
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return -ENODEV;
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}
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as = &ct3d->dc.host_dc_as;
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}
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return address_space_set(as, dpa_addr, fill_value, length, mem_attrs);
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}
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/* Perform the actual device zeroing */
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static void __do_sanitize(CXLType3Dev *ct3d)
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{
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struct CXLSanitizeInfo *san_info = ct3d->media_op_sanitize;
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int dpa_range_count = san_info->dpa_range_count;
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int rc = 0;
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int i;
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for (i = 0; i < dpa_range_count; i++) {
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rc = sanitize_range(ct3d, san_info->dpa_range_list[i].starting_dpa,
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san_info->dpa_range_list[i].length,
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san_info->fill_value);
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if (rc) {
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goto exit;
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}
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}
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exit:
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g_free(ct3d->media_op_sanitize);
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ct3d->media_op_sanitize = NULL;
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return;
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}
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enum {
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MEDIA_OP_CLASS_GENERAL = 0x0,
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#define MEDIA_OP_GEN_SUBC_DISCOVERY 0x0
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@ -1799,6 +1924,65 @@ static CXLRetCode media_operations_discovery(uint8_t *payload_in,
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return CXL_MBOX_SUCCESS;
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}
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static CXLRetCode media_operations_sanitize(CXLType3Dev *ct3d,
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uint8_t *payload_in,
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size_t len_in,
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uint8_t *payload_out,
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size_t *len_out,
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uint8_t fill_value,
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CXLCCI *cci)
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{
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struct media_operations_sanitize {
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uint8_t media_operation_class;
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uint8_t media_operation_subclass;
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uint8_t rsvd[2];
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uint32_t dpa_range_count;
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struct dpa_range_list_entry dpa_range_list[];
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} QEMU_PACKED *media_op_in_sanitize_pl = (void *)payload_in;
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uint32_t dpa_range_count = media_op_in_sanitize_pl->dpa_range_count;
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uint64_t total_mem = 0;
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size_t dpa_range_list_size;
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int secs = 0, i;
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if (dpa_range_count == 0) {
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return CXL_MBOX_SUCCESS;
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}
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dpa_range_list_size = dpa_range_count * sizeof(struct dpa_range_list_entry);
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if (len_in < (sizeof(*media_op_in_sanitize_pl) + dpa_range_list_size)) {
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return CXL_MBOX_INVALID_PAYLOAD_LENGTH;
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}
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for (i = 0; i < dpa_range_count; i++) {
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uint64_t start_dpa =
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media_op_in_sanitize_pl->dpa_range_list[i].starting_dpa;
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uint64_t length = media_op_in_sanitize_pl->dpa_range_list[i].length;
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if (validate_dpa_addr(ct3d, start_dpa, length)) {
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return CXL_MBOX_INVALID_INPUT;
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}
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total_mem += length;
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}
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ct3d->media_op_sanitize = g_malloc0(sizeof(struct CXLSanitizeInfo) +
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dpa_range_list_size);
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ct3d->media_op_sanitize->dpa_range_count = dpa_range_count;
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ct3d->media_op_sanitize->fill_value = fill_value;
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memcpy(ct3d->media_op_sanitize->dpa_range_list,
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media_op_in_sanitize_pl->dpa_range_list,
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dpa_range_list_size);
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secs = get_sanitize_duration(total_mem >> 20);
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/* EBUSY other bg cmds as of now */
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cci->bg.runtime = secs * 1000UL;
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*len_out = 0;
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/*
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* media op sanitize is targeted so no need to disable media or
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* clear event logs
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*/
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return CXL_MBOX_BG_STARTED;
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}
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static CXLRetCode cmd_media_operations(const struct cxl_cmd *cmd,
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uint8_t *payload_in,
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size_t len_in,
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@ -1812,6 +1996,7 @@ static CXLRetCode cmd_media_operations(const struct cxl_cmd *cmd,
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uint8_t rsvd[2];
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uint32_t dpa_range_count;
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} QEMU_PACKED *media_op_in_common_pl = (void *)payload_in;
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CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
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uint8_t media_op_cl = 0;
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uint8_t media_op_subclass = 0;
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@ -1830,6 +2015,19 @@ static CXLRetCode cmd_media_operations(const struct cxl_cmd *cmd,
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return media_operations_discovery(payload_in, len_in, payload_out,
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len_out);
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case MEDIA_OP_CLASS_SANITIZE:
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switch (media_op_subclass) {
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case MEDIA_OP_SAN_SUBC_SANITIZE:
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return media_operations_sanitize(ct3d, payload_in, len_in,
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payload_out, len_out, 0xF,
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cci);
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case MEDIA_OP_SAN_SUBC_ZERO:
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return media_operations_sanitize(ct3d, payload_in, len_in,
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payload_out, len_out, 0,
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cci);
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default:
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return CXL_MBOX_UNSUPPORTED;
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}
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default:
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return CXL_MBOX_UNSUPPORTED;
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}
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@ -3147,6 +3345,12 @@ static void bg_timercb(void *opaque)
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cxl_dev_enable_media(&ct3d->cxl_dstate);
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}
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break;
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case 0x4402: /* Media Operations sanitize */
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{
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CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
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__do_sanitize(ct3d);
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}
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break;
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case 0x4304: /* scan media */
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{
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CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
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@ -540,6 +540,8 @@ typedef struct CXLSetFeatureInfo {
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size_t data_size;
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} CXLSetFeatureInfo;
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struct CXLSanitizeInfo;
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struct CXLType3Dev {
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/* Private */
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PCIDevice parent_obj;
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@ -606,6 +608,8 @@ struct CXLType3Dev {
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uint8_t num_regions; /* 0-8 regions */
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CXLDCRegion regions[DCD_MAX_NUM_REGION];
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} dc;
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struct CXLSanitizeInfo *media_op_sanitize;
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};
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#define TYPE_CXL_TYPE3 "cxl-type3"
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