mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-07 01:33:56 -06:00
{hw/i2c,docs/system/arm}: Allwinner TWI/I2C Emulation
This patch implements Allwinner TWI/I2C controller emulation. Only master-mode functionality is implemented. The SPL boot for Cubieboard expects AXP209 PMIC on TWI0/I2C0 bus, so this is first part enabling the TWI/I2C bus operation. Since both Allwinner A10 and H3 use the same module, it is added for both boards. Docs are also updated for Cubieboard and Orangepi-PC board to indicate I2C availability. Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20221226220303.14420-4-strahinja.p.jankovic@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
edd3a59d5b
commit
9be8a82c0e
12 changed files with 551 additions and 1 deletions
|
@ -15,6 +15,7 @@
|
|||
#include "hw/rtc/allwinner-rtc.h"
|
||||
#include "hw/misc/allwinner-a10-ccm.h"
|
||||
#include "hw/misc/allwinner-a10-dramc.h"
|
||||
#include "hw/i2c/allwinner-i2c.h"
|
||||
|
||||
#include "target/arm/cpu.h"
|
||||
#include "qom/object.h"
|
||||
|
@ -40,6 +41,7 @@ struct AwA10State {
|
|||
AwEmacState emac;
|
||||
AllwinnerAHCIState sata;
|
||||
AwSdHostState mmc0;
|
||||
AWI2CState i2c0;
|
||||
AwRtcState rtc;
|
||||
MemoryRegion sram_a;
|
||||
EHCISysBusState ehci[AW_A10_NUM_USB];
|
||||
|
|
|
@ -47,6 +47,7 @@
|
|||
#include "hw/sd/allwinner-sdhost.h"
|
||||
#include "hw/net/allwinner-sun8i-emac.h"
|
||||
#include "hw/rtc/allwinner-rtc.h"
|
||||
#include "hw/i2c/allwinner-i2c.h"
|
||||
#include "target/arm/cpu.h"
|
||||
#include "sysemu/block-backend.h"
|
||||
|
||||
|
@ -82,6 +83,7 @@ enum {
|
|||
AW_H3_DEV_UART2,
|
||||
AW_H3_DEV_UART3,
|
||||
AW_H3_DEV_EMAC,
|
||||
AW_H3_DEV_TWI0,
|
||||
AW_H3_DEV_DRAMCOM,
|
||||
AW_H3_DEV_DRAMCTL,
|
||||
AW_H3_DEV_DRAMPHY,
|
||||
|
@ -130,6 +132,7 @@ struct AwH3State {
|
|||
AwH3SysCtrlState sysctrl;
|
||||
AwSidState sid;
|
||||
AwSdHostState mmc0;
|
||||
AWI2CState i2c0;
|
||||
AwSun8iEmacState emac;
|
||||
AwRtcState rtc;
|
||||
GICState gic;
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue