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9be8a82c0e
This patch implements Allwinner TWI/I2C controller emulation. Only master-mode functionality is implemented. The SPL boot for Cubieboard expects AXP209 PMIC on TWI0/I2C0 bus, so this is first part enabling the TWI/I2C bus operation. Since both Allwinner A10 and H3 use the same module, it is added for both boards. Docs are also updated for Cubieboard and Orangepi-PC board to indicate I2C availability. Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20221226220303.14420-4-strahinja.p.jankovic@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
51 lines
1.2 KiB
C
51 lines
1.2 KiB
C
#ifndef HW_ARM_ALLWINNER_A10_H
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#define HW_ARM_ALLWINNER_A10_H
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#include "qemu/error-report.h"
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#include "hw/char/serial.h"
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#include "hw/arm/boot.h"
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#include "hw/pci/pci_device.h"
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#include "hw/timer/allwinner-a10-pit.h"
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#include "hw/intc/allwinner-a10-pic.h"
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#include "hw/net/allwinner_emac.h"
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#include "hw/sd/allwinner-sdhost.h"
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#include "hw/ide/ahci.h"
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#include "hw/usb/hcd-ohci.h"
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#include "hw/usb/hcd-ehci.h"
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#include "hw/rtc/allwinner-rtc.h"
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#include "hw/misc/allwinner-a10-ccm.h"
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#include "hw/misc/allwinner-a10-dramc.h"
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#include "hw/i2c/allwinner-i2c.h"
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#include "target/arm/cpu.h"
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#include "qom/object.h"
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#define AW_A10_SDRAM_BASE 0x40000000
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#define AW_A10_NUM_USB 2
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#define TYPE_AW_A10 "allwinner-a10"
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OBJECT_DECLARE_SIMPLE_TYPE(AwA10State, AW_A10)
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struct AwA10State {
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/*< private >*/
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DeviceState parent_obj;
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/*< public >*/
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ARMCPU cpu;
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AwA10ClockCtlState ccm;
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AwA10DramControllerState dramc;
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AwA10PITState timer;
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AwA10PICState intc;
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AwEmacState emac;
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AllwinnerAHCIState sata;
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AwSdHostState mmc0;
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AWI2CState i2c0;
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AwRtcState rtc;
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MemoryRegion sram_a;
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EHCISysBusState ehci[AW_A10_NUM_USB];
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OHCISysBusState ohci[AW_A10_NUM_USB];
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};
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#endif
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