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hw/pci: Constify all Property

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Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2024-12-13 16:36:46 +00:00
parent 909a5c0afa
commit 8a1852f8c2
4 changed files with 5 additions and 5 deletions
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2
hw/pci/pci.c
View file

@ -81,7 +81,7 @@ static const PropertyInfo prop_pci_busnr = {
.get = prop_pci_busnr_get, .get = prop_pci_busnr_get,
}; };
static Property pci_props[] = { static const Property pci_props[] = {
DEFINE_PROP_PCI_DEVFN("addr", PCIDevice, devfn, -1), DEFINE_PROP_PCI_DEVFN("addr", PCIDevice, devfn, -1),
DEFINE_PROP_STRING("romfile", PCIDevice, romfile), DEFINE_PROP_STRING("romfile", PCIDevice, romfile),
DEFINE_PROP_UINT32("romsize", PCIDevice, romsize, UINT32_MAX), DEFINE_PROP_UINT32("romsize", PCIDevice, romsize, UINT32_MAX),

2
hw/pci/pci_bridge.c
View file

@ -477,7 +477,7 @@ int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, int cap_offset,
return 0; return 0;
} }
static Property pci_bridge_properties[] = { static const Property pci_bridge_properties[] = {
DEFINE_PROP_BOOL("x-pci-express-writeable-slt-bug", PCIBridge, DEFINE_PROP_BOOL("x-pci-express-writeable-slt-bug", PCIBridge,
pcie_writeable_slt_bug, false), pcie_writeable_slt_bug, false),
DEFINE_PROP_END_OF_LIST(), DEFINE_PROP_END_OF_LIST(),

2
hw/pci/pci_host.c
View file

@ -240,7 +240,7 @@ const VMStateDescription vmstate_pcihost = {
} }
}; };
static Property pci_host_properties_common[] = { static const Property pci_host_properties_common[] = {
DEFINE_PROP_BOOL("x-config-reg-migration-enabled", PCIHostState, DEFINE_PROP_BOOL("x-config-reg-migration-enabled", PCIHostState,
mig_enabled, true), mig_enabled, true),
DEFINE_PROP_BOOL(PCI_HOST_BYPASS_IOMMU, PCIHostState, bypass_iommu, false), DEFINE_PROP_BOOL(PCI_HOST_BYPASS_IOMMU, PCIHostState, bypass_iommu, false),

4
hw/pci/pcie_port.c
View file

@ -111,7 +111,7 @@ void pcie_chassis_del_slot(PCIESlot *s)
QLIST_REMOVE(s, next); QLIST_REMOVE(s, next);
} }
static Property pcie_port_props[] = { static const Property pcie_port_props[] = {
DEFINE_PROP_UINT8("port", PCIEPort, port, 0), DEFINE_PROP_UINT8("port", PCIEPort, port, 0),
DEFINE_PROP_UINT16("aer_log_max", PCIEPort, DEFINE_PROP_UINT16("aer_log_max", PCIEPort,
parent_obj.parent_obj.exp.aer_log.log_max, parent_obj.parent_obj.exp.aer_log.log_max,
@ -204,7 +204,7 @@ static const TypeInfo pcie_port_type_info = {
.class_init = pcie_port_class_init, .class_init = pcie_port_class_init,
}; };
static Property pcie_slot_props[] = { static const Property pcie_slot_props[] = {
DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0), DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0),
DEFINE_PROP_UINT16("slot", PCIESlot, slot, 0), DEFINE_PROP_UINT16("slot", PCIESlot, slot, 0),
DEFINE_PROP_BOOL("hotplug", PCIESlot, hotplug, true), DEFINE_PROP_BOOL("hotplug", PCIESlot, hotplug, true),