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target/riscv: store RISCVCPUDef struct directly in the class
Prepare for adding more fields to RISCVCPUDef and reading them in riscv_cpu_init: instead of storing the misa_mxl_max field in RISCVCPUClass, ensure that there's always a valid RISCVCPUDef struct and go through it. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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commit
5fd23f20e1
8 changed files with 39 additions and 29 deletions
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@ -62,7 +62,7 @@ int riscv_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
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return 0;
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}
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switch (mcc->misa_mxl_max) {
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switch (mcc->def->misa_mxl_max) {
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case MXL_RV32:
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return gdb_get_reg32(mem_buf, tmp);
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case MXL_RV64:
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@ -82,7 +82,7 @@ int riscv_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
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int length = 0;
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target_ulong tmp;
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switch (mcc->misa_mxl_max) {
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switch (mcc->def->misa_mxl_max) {
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case MXL_RV32:
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tmp = (int32_t)ldl_p(mem_buf);
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length = 4;
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@ -359,7 +359,7 @@ void riscv_cpu_register_gdb_regs_for_features(CPUState *cs)
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ricsv_gen_dynamic_vector_feature(cs, cs->gdb_num_regs),
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0);
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}
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switch (mcc->misa_mxl_max) {
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switch (mcc->def->misa_mxl_max) {
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case MXL_RV32:
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gdb_register_coprocessor(cs, riscv_gdb_get_virtual,
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riscv_gdb_set_virtual,
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