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target/riscv: introduce RISCVCPUDef

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Start putting all the CPU definitions in a struct.  Later this will replace
instance_init functions with declarative code, for now just remove the
ugly cast of class_data.

Reviewed-by: Alistair Francis <alistair23@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2025-02-06 13:12:09 +01:00
parent 80b22be382
commit 71fb3aa5eb
2 changed files with 22 additions and 9 deletions
Download patch file Download diff file Expand all files Collapse all files

27
target/riscv/cpu.c
View file

@ -3073,8 +3073,9 @@ static void riscv_cpu_common_class_init(ObjectClass *c, const void *data)
static void riscv_cpu_class_init(ObjectClass *c, const void *data)
{
RISCVCPUClass *mcc = RISCV_CPU_CLASS(c);
const RISCVCPUDef *def = data;
mcc->misa_mxl_max = (RISCVMXL)GPOINTER_TO_UINT(data);
mcc->misa_mxl_max = def->misa_mxl_max;
riscv_cpu_validate_misa_mxl(mcc);
}
@ -3170,40 +3171,48 @@ void riscv_isa_write_fdt(RISCVCPU *cpu, void *fdt, char *nodename)
}
#endif
#define DEFINE_DYNAMIC_CPU(type_name, misa_mxl_max, initfn) \
#define DEFINE_DYNAMIC_CPU(type_name, misa_mxl_max_, initfn) \
{ \
.name = (type_name), \
.parent = TYPE_RISCV_DYNAMIC_CPU, \
.instance_init = (initfn), \
.class_init = riscv_cpu_class_init, \
.class_data = GUINT_TO_POINTER(misa_mxl_max) \
.class_data = &(const RISCVCPUDef) { \
.misa_mxl_max = (misa_mxl_max_), \
}, \
}
#define DEFINE_VENDOR_CPU(type_name, misa_mxl_max, initfn) \
#define DEFINE_VENDOR_CPU(type_name, misa_mxl_max_, initfn) \
{ \
.name = (type_name), \
.parent = TYPE_RISCV_VENDOR_CPU, \
.instance_init = (initfn), \
.class_init = riscv_cpu_class_init, \
.class_data = GUINT_TO_POINTER(misa_mxl_max) \
.class_data = &(const RISCVCPUDef) { \
.misa_mxl_max = (misa_mxl_max_), \
}, \
}
#define DEFINE_BARE_CPU(type_name, misa_mxl_max, initfn) \
#define DEFINE_BARE_CPU(type_name, misa_mxl_max_, initfn) \
{ \
.name = (type_name), \
.parent = TYPE_RISCV_BARE_CPU, \
.instance_init = (initfn), \
.class_init = riscv_cpu_class_init, \
.class_data = GUINT_TO_POINTER(misa_mxl_max) \
.class_data = &(const RISCVCPUDef) { \
.misa_mxl_max = (misa_mxl_max_), \
}, \
}
#define DEFINE_PROFILE_CPU(type_name, misa_mxl_max, initfn) \
#define DEFINE_PROFILE_CPU(type_name, misa_mxl_max_, initfn) \
{ \
.name = (type_name), \
.parent = TYPE_RISCV_BARE_CPU, \
.instance_init = (initfn), \
.class_init = riscv_cpu_class_init, \
.class_data = GUINT_TO_POINTER(misa_mxl_max) \
.class_data = &(const RISCVCPUDef) { \
.misa_mxl_max = (misa_mxl_max_), \
}, \
}
static const TypeInfo riscv_cpu_type_infos[] = {

4
target/riscv/cpu.h
View file

@ -538,6 +538,10 @@ struct ArchCPU {
const GPtrArray *decoders;
};
typedef struct RISCVCPUDef {
RISCVMXL misa_mxl_max; /* max mxl for this cpu */
} RISCVCPUDef;
/**
* RISCVCPUClass:
* @parent_realize: The parent class' realize handler.