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hw/arm/fsl-imx8mp: Add SNVS
SNVS contains an RTC which allows Linux to deal correctly with time. This is particularly useful when handling persistent storage which will be done in the next patch. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-id: 20250223114708.1780-7-shentey@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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3 changed files with 13 additions and 0 deletions
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@ -12,6 +12,7 @@ The ``imx8mp-evk`` machine implements the following devices:
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* Up to 4 Cortex-A53 cores
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* Generic Interrupt Controller (GICv3)
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* 4 UARTs
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* Secure Non-Volatile Storage (SNVS) including an RTC
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* Clock Tree
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Boot options
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@ -201,6 +201,8 @@ static void fsl_imx8mp_init(Object *obj)
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object_initialize_child(obj, "analog", &s->analog, TYPE_IMX8MP_ANALOG);
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object_initialize_child(obj, "snvs", &s->snvs, TYPE_IMX7_SNVS);
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for (i = 0; i < FSL_IMX8MP_NUM_UARTS; i++) {
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g_autofree char *name = g_strdup_printf("uart%d", i + 1);
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object_initialize_child(obj, name, &s->uart[i], TYPE_IMX_SERIAL);
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@ -344,6 +346,13 @@ static void fsl_imx8mp_realize(DeviceState *dev, Error **errp)
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qdev_get_gpio_in(gicdev, serial_table[i].irq));
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}
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/* SNVS */
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->snvs), errp)) {
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return;
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}
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->snvs), 0,
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fsl_imx8mp_memmap[FSL_IMX8MP_SNVS_HP].addr);
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/* Unimplemented devices */
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for (i = 0; i < ARRAY_SIZE(fsl_imx8mp_memmap); i++) {
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switch (i) {
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@ -352,6 +361,7 @@ static void fsl_imx8mp_realize(DeviceState *dev, Error **errp)
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case FSL_IMX8MP_GIC_DIST:
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case FSL_IMX8MP_GIC_REDIST:
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case FSL_IMX8MP_RAM:
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case FSL_IMX8MP_SNVS_HP:
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case FSL_IMX8MP_UART1 ... FSL_IMX8MP_UART4:
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/* device implemented and treated above */
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break;
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@ -12,6 +12,7 @@
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#include "cpu.h"
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#include "hw/char/imx_serial.h"
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#include "hw/intc/arm_gicv3_common.h"
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#include "hw/misc/imx7_snvs.h"
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#include "hw/misc/imx8mp_analog.h"
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#include "hw/misc/imx8mp_ccm.h"
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#include "qom/object.h"
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@ -36,6 +37,7 @@ struct FslImx8mpState {
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GICv3State gic;
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IMX8MPCCMState ccm;
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IMX8MPAnalogState analog;
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IMX7SNVSState snvs;
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IMXSerialState uart[FSL_IMX8MP_NUM_UARTS];
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};
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