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tcg: Convert mul to TCGOutOpBinary
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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commit
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11 changed files with 210 additions and 148 deletions
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@ -921,13 +921,6 @@ static void tcg_out_dat_rIN(TCGContext *s, ARMCond cond, ARMInsn opc,
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}
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}
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static void tcg_out_mul32(TCGContext *s, ARMCond cond, TCGReg rd,
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TCGReg rn, TCGReg rm)
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{
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/* mul */
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tcg_out32(s, (cond << 28) | 0x90 | (rd << 16) | (rm << 8) | rn);
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}
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static void tcg_out_umull32(TCGContext *s, ARMCond cond, TCGReg rd0,
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TCGReg rd1, TCGReg rn, TCGReg rm)
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{
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@ -1885,6 +1878,18 @@ static const TCGOutOpBinary outop_eqv = {
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.base.static_constraint = C_NotImplemented,
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};
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static void tgen_mul(TCGContext *s, TCGType type,
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TCGReg a0, TCGReg a1, TCGReg a2)
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{
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/* mul */
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tcg_out32(s, (COND_AL << 28) | 0x90 | (a0 << 16) | (a1 << 8) | a2);
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}
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static const TCGOutOpBinary outop_mul = {
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.base.static_constraint = C_O1_I2(r, r, r),
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.out_rrr = tgen_mul,
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};
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static const TCGOutOpBinary outop_nand = {
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.base.static_constraint = C_NotImplemented,
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};
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@ -2060,9 +2065,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type,
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}
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tcg_out_mov_reg(s, COND_AL, args[0], a0);
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break;
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case INDEX_op_mul_i32:
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tcg_out_mul32(s, COND_AL, args[0], args[1], args[2]);
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break;
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case INDEX_op_mulu2_i32:
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tcg_out_umull32(s, COND_AL, args[0], args[1], args[2], args[3]);
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break;
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@ -2258,7 +2260,6 @@ tcg_target_op_def(TCGOpcode op, TCGType type, unsigned flags)
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case INDEX_op_ctz_i32:
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return C_O1_I2(r, r, rIK);
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case INDEX_op_mul_i32:
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case INDEX_op_div_i32:
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case INDEX_op_divu_i32:
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return C_O1_I2(r, r, r);
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