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ppc/pnv: add a LPC Controller model for POWER9

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The LPC Controller on POWER9 is very similar to the one found on
POWER8 but accesses are now done via on MMIOs, without the XSCOM and
ECCB logic. The device tree is populated differently so we add a
specific POWER9 routine for the purpose.

SerIRQ routing is yet to be done.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20190307223548.20516-7-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Cédric Le Goater 2019-03-07 23:35:39 +01:00 • committed by David Gibson
parent 64d011d56e
commit 15376c66fa
4 changed files with 234 additions and 1 deletions
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9
include/hw/ppc/pnv_lpc.h
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@ -27,6 +27,9 @@
#define TYPE_PNV8_LPC TYPE_PNV_LPC "-POWER8"
#define PNV8_LPC(obj) OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV8_LPC)
#define TYPE_PNV9_LPC TYPE_PNV_LPC "-POWER9"
#define PNV9_LPC(obj) OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV9_LPC)
typedef struct PnvLpcController {
DeviceState parent;
@ -85,6 +88,12 @@ typedef struct PnvLpcClass {
DeviceRealize parent_realize;
} PnvLpcClass;
/*
* Old compilers error on typdef forward declarations. Keep them happy.
*/
struct PnvChip;
ISABus *pnv_lpc_isa_create(PnvLpcController *lpc, bool use_cpld, Error **errp);
int pnv_dt_lpc(struct PnvChip *chip, void *fdt, int root_offset);
#endif /* _PPC_PNV_LPC_H */