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tcg/arm: Add host vector framework

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Add registers and function stubs.  The functionality
is disabled via use_neon_instructions defined to 0.

We must still include results for the mandatory opcodes in
tcg_target_op_def, as all opcodes are checked during tcg init.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2021-05-03 16:47:52 -07:00
parent a4fbbd779a
commit 000cf4777a
5 changed files with 158 additions and 24 deletions
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1
tcg/arm/tcg-target-con-str.h
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@ -11,6 +11,7 @@
REGS('r', ALL_GENERAL_REGS)
REGS('l', ALL_QLOAD_REGS)
REGS('s', ALL_QSTORE_REGS)
REGS('w', ALL_VECTOR_REGS)
/*
* Define constraint letters for constants: