mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-03 07:43:54 -06:00
000cf4777a
Add registers and function stubs. The functionality is disabled via use_neon_instructions defined to 0. We must still include results for the mandatory opcodes in tcg_target_op_def, as all opcodes are checked during tcg init. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
23 lines
527 B
C
23 lines
527 B
C
/* SPDX-License-Identifier: MIT */
|
|
/*
|
|
* Define Arm target-specific operand constraints.
|
|
* Copyright (c) 2021 Linaro
|
|
*/
|
|
|
|
/*
|
|
* Define constraint letters for register sets:
|
|
* REGS(letter, register_mask)
|
|
*/
|
|
REGS('r', ALL_GENERAL_REGS)
|
|
REGS('l', ALL_QLOAD_REGS)
|
|
REGS('s', ALL_QSTORE_REGS)
|
|
REGS('w', ALL_VECTOR_REGS)
|
|
|
|
/*
|
|
* Define constraint letters for constants:
|
|
* CONST(letter, TCG_CT_CONST_* bit set)
|
|
*/
|
|
CONST('I', TCG_CT_CONST_ARM)
|
|
CONST('K', TCG_CT_CONST_INV)
|
|
CONST('N', TCG_CT_CONST_NEG)
|
|
CONST('Z', TCG_CT_CONST_ZERO)
|