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proper calling

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This commit is contained in:
Andrew 2025-10-17 04:23:17 -04:00
parent b5a41a87da
commit 89557f3f53
3 changed files with 13 additions and 16 deletions
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11
buildroot/share/PlatformIO/variants/MARLIN_F103VE_LONGER/variant.cpp
View file

@ -158,11 +158,12 @@ static bool SetSysClock_PLL_HSE(bool bypass)
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) == HAL_OK) {
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB;
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; // 72/1.5 = 48MHz
#ifndef USBCON
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
#else
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB;
#endif
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) == HAL_OK) {
ret = true;
@ -189,11 +190,12 @@ bool SetSysClock_PLL_HSI(void)
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; // 4 MHz
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; // 48 MHz
#ifndef USBCON
// When the HSI is used as a PLL clock input, the maximum
// system clock frequency that can be achieved is 64 MHz.
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; // 64 MHz, stay close to 72 for delay()
#else
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; // 48 MHz
#endif
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
// Initializes the CPU, AHB and APB busses clocks
@ -206,12 +208,13 @@ bool SetSysClock_PLL_HSI(void)
// FLASH_LATENCY_1 may cause boot loops
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) == HAL_OK) {
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB;
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4;
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; // requires 48 MHz
#ifndef USBCON
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;// No USB, RTC nor I2S
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; // 2 4 6 8
#else
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB;
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4; // Use DIV4 for USB-enabled configuration
#endif
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) == HAL_OK) {
ret = true;

9
buildroot/share/PlatformIO/variants/marlin_maple_CHITU_F103/wirish/syscalls.c
View file

@ -116,8 +116,7 @@ __weak void putch(unsigned char c __attribute__((unused))) {
}
__weak void cgets(char *s, int bufsize) {
char *p;
int c;
char *p = s;
int i;
for (i = 0; i < bufsize; i++) {
@ -125,10 +124,8 @@ __weak void cgets(char *s, int bufsize) {
}
// memset(s, 0, bufsize);
p = s;
for (p = s; p < s + bufsize-1;) {
c = getch();
for (p = s; p < s + bufsize - 1;) {
int c = getch();
switch (c) {
case '\r' :
case '\n' :

9
buildroot/share/PlatformIO/variants/marlin_maple_MEEB_3DP/wirish/syscalls.c
View file

@ -116,8 +116,7 @@ __weak void putch(unsigned char c) {
}
__weak void cgets(char *s, int bufsize) {
char *p;
int c;
char *p = s;
int i;
for (i = 0; i < bufsize; i++) {
@ -125,10 +124,8 @@ __weak void cgets(char *s, int bufsize) {
}
// memset(s, 0, bufsize);
p = s;
for (p = s; p < s + bufsize-1;) {
c = getch();
for (p = s; p < s + bufsize - 1;) {
int c = getch();
switch (c) {
case '\r' :
case '\n' :