qemu/target
Ilya Leoshkevich cbdb457d79 target/s390x: Fix MVC not always invalidating translation blocks
Node.js crashes in qemu-system-s390x with random SIGSEGVs / SIGILLs.

The v8 JIT used by Node.js can garbage collect and overwrite unused
code. Overwriting is performed by WritableJitAllocation::CopyCode(),
which ultimately calls memcpy(). For certain sizes, memcpy() uses the
MVC instruction.

QEMU implements MVC and other similar instructions using helpers. While
TCG store ops invalidate affected translation blocks automatically,
helpers must do this manually by calling probe_access_flags(). The MVC
helper does this using the access_prepare() -> access_prepare_nf() ->
s390_probe_access() -> probe_access_flags() call chain.

At the last step of this chain, the store size is replaced with 0. This
causes the probe_access_flags() -> notdirty_write() ->
tb_invalidate_phys_range_fast() chain to miss some translation blocks.

When this happens, QEMU executes a mix of old and new code. This
quickly leads to either a SIGSEGV or a SIGILL in case the old code
ends in the middle of a new instruction.

Fix by passing the true size.

Reported-by: Berthold Gunreben <azouhr@opensuse.org>
Cc: Sarah Kriesch <ada.lovelace@gmx.de>
Cc: qemu-stable@nongnu.org
Closes: https://bugzilla.opensuse.org/show_bug.cgi?id=1235709
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: David Hildenbrand <david@redhat.com>
Fixes: e2faabee78 ("accel/tcg: Forward probe size on to notdirty_write")
Message-ID: <20250128001338.11474-1-iii@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
(cherry picked from commit e43ced8be1)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2025-02-01 11:59:14 +03:00
..
alpha hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
arm target/arm: arm_reset_sve_state() should set FPSR, not FPCR 2025-01-29 22:25:22 +03:00
avr hw/avr/atmega: Fix wrong initial value of stack pointer 2023-11-28 14:27:12 +01:00
cris hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
hexagon target/hexagon: don't look for static glib 2024-08-28 08:37:15 +03:00
hppa target/hppa: Fix PSW V-bit packaging in cpu_hppa_get for hppa64 2024-09-05 23:00:34 +03:00
i386 target/i386/cpu: Fix notes for CPU models 2024-12-29 02:22:55 +03:00
loongarch target/loongarch: Use actual operand size with vbsrl check 2024-12-29 01:51:02 +03:00
m68k target/m68k: Always return a temporary from gen_lea_mode 2024-10-10 21:08:58 +03:00
microblaze target: Move ArchCPUClass definition to 'cpu.h' 2023-11-07 13:08:48 +01:00
mips target: Move ArchCPUClass definition to 'cpu.h' 2023-11-07 13:08:48 +01:00
nios2 target: Move ArchCPUClass definition to 'cpu.h' 2023-11-07 13:08:48 +01:00
openrisc hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
ppc target/ppc: Fix non-maskable interrupt while halted 2024-12-16 15:27:45 +03:00
riscv target/riscv: Avoid bad shift in riscv_cpu_do_interrupt() 2024-12-16 15:27:45 +03:00
rx target/rx: Use target_ulong for address in LI 2024-08-28 08:37:14 +03:00
s390x target/s390x: Fix MVC not always invalidating translation blocks 2025-02-01 11:59:14 +03:00
sh4 target/sh4: Fix SUBV opcode 2024-05-04 09:37:20 +03:00
sparc target/sparc: Restrict STQF to sparcv9 2024-08-28 08:37:15 +03:00
tricore hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
xtensa target/xtensa: fix OOB TLB entry access 2024-01-27 18:04:54 +03:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
meson.build target/loongarch: Add target build suport 2022-06-06 18:09:03 +00:00