qemu/target
Peter Maydell 5f2fd50a76 target/arm: Don't assert() for ISB/SB inside IT block
If the guest code has an ISB or SB insn inside an IT block, we
generate incorrect code which trips a TCG assertion:

qemu-system-arm: ../tcg/tcg-op.c:3343: void tcg_gen_goto_tb(unsigned int): Assertion `(tcg_ctx->goto_tb_issue_mask & (1 << idx)) == 0' failed.

This is because we call gen_goto_tb(dc, 1, ...) twice:

 brcond_i32 ZF,$0x0,ne,$L1
 add_i32 pc,pc,$0x4
 goto_tb $0x1
 exit_tb $0x73d948001b81
 set_label $L1
 add_i32 pc,pc,$0x4
 goto_tb $0x1
 exit_tb $0x73d948001b81

Both calls are in arm_tr_tb_stop(), one for the
DISAS_NEXT/DISAS_TOO_MANY handling, and one for the dc->condjump
condition-failed codepath.  The DISAS_NEXT handling doesn't have this
problem because arm_post_translate_insn() does the handling of "emit
the label for the condition-failed conditional execution" and so
arm_tr_tb_stop() doesn't have dc->condjump set.  But for
DISAS_TOO_MANY we don't do that.

Fix the bug by making arm_post_translate_insn() handle the
DISAS_TOO_MANY case.  This only affects the SB and ISB insns when
used in Thumb mode inside an IT block: only these insns specifically
set is_jmp to TOO_MANY, and their A32 encodings are unconditional.

For the major TOO_MANY case (breaking the TB because it would cross a
page boundary) we do that check and set is_jmp to TOO_MANY only after
the call to arm_post_translate_insn(); so arm_post_translate_insn()
sees is_jmp == DISAS_NEXT, and  we emit the correct code for that
situation.

With this fix we generate the somewhat more sensible set of TCG ops:
 brcond_i32 ZF,$0x0,ne,$L1
 set_label $L1
 add_i32 pc,pc,$0x4
 goto_tb $0x1
 exit_tb $0x7c5434001b81

(NB: the TCG optimizer doesn't optimize out the jump-to-next, but
we can't really avoid emitting it because we don't know at the
point we're emitting the handling for the condexec check whether
this insn is going to happen to be a nop for us or not.)

Cc: qemu-stable@nongnu.org
Fixes: https://gitlab.com/qemu-project/qemu/-/issues/2942
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250501125544.727038-1-peter.maydell@linaro.org
(cherry picked from commit 8ed7c0b648)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2025-05-08 10:22:34 +03:00
..
alpha accel/tcg: Remove will_exit argument from cpu_restore_state 2022-11-01 08:31:41 +11:00
arm target/arm: Don't assert() for ISB/SB inside IT block 2025-05-08 10:22:34 +03:00
avr target/avr: Improve decode of LDS, STS 2025-04-24 10:30:44 +03:00
cris accel/tcg: Remove will_exit argument from cpu_restore_state 2022-11-01 08:31:41 +11:00
hexagon target/hexagon: Convert to tcg_ops restore_state_to_opc 2022-10-26 11:11:28 +10:00
hppa target/hppa: Clear psw_n for BE on use_nullify_skip path 2024-04-09 20:09:20 +03:00
i386 target/i386/hvf: fix lflags_to_rflags 2025-04-24 10:27:40 +03:00
loongarch target/loongarch: fix a wrong print in cpu dump 2024-06-07 08:10:49 +03:00
m68k target/m68k: Fix semihost lseek offset computation 2023-08-03 08:26:26 +03:00
microblaze accel/tcg: Remove will_exit argument from cpu_restore_state 2022-11-01 08:31:41 +11:00
mips target/mips: Simplify and fix update_pagemask 2025-04-05 16:51:46 +03:00
nios2 target/nios2: Fix semihost lseek offset computation 2023-08-03 08:26:26 +03:00
openrisc accel/tcg: Remove will_exit argument from cpu_restore_state 2022-11-01 08:31:41 +11:00
ppc target/ppc: Fix e200 duplicate SPRs 2025-03-24 08:02:52 +03:00
riscv target/riscv: throw debug exception before page fault 2025-03-22 10:52:25 +03:00
rx target/rx: Use target_ulong for address in LI 2024-07-30 22:28:41 +03:00
s390x target/s390x: Fix LAE setting a wrong access register 2024-01-13 11:28:02 +03:00
sh4 target/sh4: add missing CHECK_NOT_DELAY_SLOT 2024-04-10 20:40:02 +03:00
sparc target/sparc: Fix gdbstub incorrectly handling registers f32-f62 2025-03-22 10:52:25 +03:00
tricore target/tricore: Rename tricore_feature 2023-11-19 21:15:23 +03:00
xtensa target/xtensa: fix OOB TLB entry access 2024-01-27 18:05:30 +03:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
meson.build target/loongarch: Add target build suport 2022-06-06 18:09:03 +00:00