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Peter Maydell 2ccede18bd -----BEGIN PGP SIGNATURE----- 
iQIcBAABAgAGBQJYeeoXAAoJEPMMOL0/L7482jcQAJFoNya2rIDrK8ljb8XldnlJ
 kvgywaceh6jZUuGTfgJ4S1k9CUvSvC3Ds9Y7qkseZ9kzktS9oIbvcuEi+INWiE6J
 ZmjP4KkYeKQ2rhiglbirHkweFmEXONqu2Ca1DfV/O6DkhyF25y1HO26Zu7P1ai2/
 oq7xNaQbot8+6fntatiRNvAcWOwrq2zHG/BHU8anaNVdgYqHViZWFOKl3oM/GF7M
 jz26SWhSduCNg4dzgULlnQsin8mnd3k9U+r2Rdo5szUhly794EOay3eVNPCmN1RF
 5tGP+pyx2m34ZiCNBxwQlcHVjNGq6vQMCrIWBo6x9wABeGStxX7HhrZQ88JtCjWU
 DQ7nbhLKaE1t39I/Ax3MCbz1c+zREHC0ivnZEMiXwdr/leP1dj6cyLw2UVQ2uk7r
 azgV6Z6AbdmCr1/kSJQQkWxTvQFzQDWTgfFXgC6LvYj+5wFp1JXphPSrGTYM72sz
 e3UnKyDHiBIK00jJ16k5wAlGI1yvu7N8zxVjAQ7WCs896ki3ita1NsG1Mgs2QAHb
 FWkinnfLZE0W7MKX9Iw3X7YUxI4r4LhODC31X7CCP/LeZPjAGV4qS96cICtm8VqM
 9/4nFFhGH15eYVKNQu/vVgjdh1IMpcmqMBtmv9Ndr5f9c/IIHlWXKGlj5qkypMpL
 14YzVoiBxP+1aUIo6mts
 =iBam
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-2.9-pull-request' into staging

# gpg: Signature made Sat 14 Jan 2017 09:06:31 GMT
# gpg:                using RSA key 0xF30C38BD3F2FBE3C
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>"
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>"
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>"
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier/tags/m68k-for-2.9-pull-request:
  target-m68k: increment/decrement with SP
  target-m68k: CAS doesn't need aligned access
  target-m68k: manage pre-dec et post-inc in CAS
  target-m68k: fix gen_flush_flags()
  target-m68k: fix bit operation with immediate value
  m68k: Remove PCI and USB from config file
  target-m68k: Implement bfffo
  target-m68k: Implement bitfield ops for memory
  target-m68k: Implement bitfield ops for registers

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-16 12:41:35 +00:00
..
alpha target-alpha: Use ctpop helper 2017-01-10 08:48:56 -08:00
arm target/arm: Fix ubfx et al for aarch64 2017-01-13 09:48:20 -08:00
cris target-cris: Use clz opcode 2017-01-10 08:06:11 -08:00
i386 x86 and machine queue, 2017-01-17 2017-01-13 14:38:21 +00:00
lm32 Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
m68k target-m68k: increment/decrement with SP 2017-01-14 10:06:21 +01:00
microblaze target-microblaze: Use clz opcode 2017-01-10 08:06:11 -08:00
mips target-mips: Use clz opcode 2017-01-10 08:06:11 -08:00
moxie Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
openrisc target-openrisc: Use clz and ctz opcodes 2017-01-10 08:06:11 -08:00
ppc x86 and machine queue, 2017-01-17 2017-01-13 14:38:21 +00:00
s390x x86 and machine queue, 2017-01-17 2017-01-13 14:38:21 +00:00
sh4 Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
sparc target-sparc: Use ctpop helper 2017-01-10 08:49:55 -08:00
tilegx target-tilegx: Use ctpop helper 2017-01-10 08:49:59 -08:00
tricore TriCore FPU patches 2017-01-12 18:29:49 +00:00
unicore32 target-unicore32: Use clz opcode 2017-01-10 08:06:11 -08:00
xtensa target-xtensa: Use clrsb helper 2017-01-10 08:47:48 -08:00