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qemu/target-tilegx
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Chen Gang fec7daab3d target-tilegx: Support iret instruction and related special registers 
EX_CONTEXT_0_0 is used for jumping address, and EX_CONTEXT_0_1 is for
INTERRUPT_CRITICAL_SECTION, which should only be 0 or 1 in user mode, or
it will cause target SIGILL (and the patch doesn't support system mode).

Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-10-07 20:24:04 +11:00
..
cpu.c target-tilegx: Use TILEGX_EXCP_SIGNAL instead of TILEGX_EXCP_SEGV 2015-10-07 20:03:15 +11:00
cpu.h target-tilegx: Support iret instruction and related special registers 2015-10-07 20:24:04 +11:00
helper.c target-tilegx: Support iret instruction and related special registers 2015-10-07 20:24:04 +11:00
helper.h target-tilegx: Support iret instruction and related special registers 2015-10-07 20:24:04 +11:00
Makefile.objs target-tilegx: Handle v1shl, v1shru, v1shrs 2015-09-15 07:45:34 -07:00
opcode_tilegx.h target-tilegx: Fix LDNA_ADD_IMM8_OPCODE_X1 2015-09-15 07:41:35 -07:00
simd_helper.c target-tilegx: Implement v2mults instruction 2015-10-07 20:03:16 +11:00
spr_def_64.h target-tilegx: Add special register information from Tilera Corporation 2015-09-15 07:41:35 -07:00
translate.c target-tilegx: Support iret instruction and related special registers 2015-10-07 20:24:04 +11:00