mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-07-27 12:23:53 -06:00
ff871d0462
Some boards such as vmapple don't do real legacy PCI IRQ swizzling. Instead, they just keep allocating more board IRQ lines for each new legacy IRQ. Let's support that mode by giving instantiators a new "nr_irqs" property they can use to support more than 4 legacy IRQ lines. In this mode, GPEX will export more IRQ lines, one for each device. Signed-off-by: Alexander Graf <graf@amazon.com> Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu> Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com> Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20241223221645.29911-9-phil@philjordan.eu> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
84 lines
2.4 KiB
C
84 lines
2.4 KiB
C
/*
|
|
* QEMU Generic PCI Express Bridge Emulation
|
|
*
|
|
* Copyright (C) 2015 Alexander Graf <agraf@suse.de>
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation; either version 2 of the License, or
|
|
* (at your option) any later version.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; if not, see <http://www.gnu.org/licenses/>
|
|
*/
|
|
|
|
#ifndef HW_GPEX_H
|
|
#define HW_GPEX_H
|
|
|
|
#include "exec/hwaddr.h"
|
|
#include "hw/sysbus.h"
|
|
#include "hw/pci/pci_device.h"
|
|
#include "hw/pci/pcie_host.h"
|
|
#include "qom/object.h"
|
|
|
|
#define TYPE_GPEX_HOST "gpex-pcihost"
|
|
OBJECT_DECLARE_SIMPLE_TYPE(GPEXHost, GPEX_HOST)
|
|
|
|
#define TYPE_GPEX_ROOT_DEVICE "gpex-root"
|
|
OBJECT_DECLARE_SIMPLE_TYPE(GPEXRootState, GPEX_ROOT_DEVICE)
|
|
|
|
struct GPEXRootState {
|
|
/*< private >*/
|
|
PCIDevice parent_obj;
|
|
/*< public >*/
|
|
};
|
|
|
|
struct GPEXConfig {
|
|
MemMapEntry ecam;
|
|
MemMapEntry mmio32;
|
|
MemMapEntry mmio64;
|
|
MemMapEntry pio;
|
|
int irq;
|
|
PCIBus *bus;
|
|
};
|
|
|
|
typedef struct GPEXIrq GPEXIrq;
|
|
struct GPEXHost {
|
|
/*< private >*/
|
|
PCIExpressHost parent_obj;
|
|
/*< public >*/
|
|
|
|
GPEXRootState gpex_root;
|
|
|
|
MemoryRegion io_ioport;
|
|
MemoryRegion io_mmio;
|
|
MemoryRegion io_ioport_window;
|
|
MemoryRegion io_mmio_window;
|
|
GPEXIrq *irq;
|
|
uint8_t num_irqs;
|
|
|
|
bool allow_unmapped_accesses;
|
|
|
|
struct GPEXConfig gpex_cfg;
|
|
};
|
|
|
|
int gpex_set_irq_num(GPEXHost *s, int index, int gsi);
|
|
|
|
void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg);
|
|
void acpi_dsdt_add_gpex_host(Aml *scope, uint32_t irq);
|
|
|
|
#define PCI_HOST_PIO_BASE "x-pio-base"
|
|
#define PCI_HOST_PIO_SIZE "x-pio-size"
|
|
#define PCI_HOST_ECAM_BASE "x-ecam-base"
|
|
#define PCI_HOST_ECAM_SIZE "x-ecam-size"
|
|
#define PCI_HOST_BELOW_4G_MMIO_BASE "x-below-4g-mmio-base"
|
|
#define PCI_HOST_BELOW_4G_MMIO_SIZE "x-below-4g-mmio-size"
|
|
#define PCI_HOST_ABOVE_4G_MMIO_BASE "x-above-4g-mmio-base"
|
|
#define PCI_HOST_ABOVE_4G_MMIO_SIZE "x-above-4g-mmio-size"
|
|
|
|
#endif /* HW_GPEX_H */
|