qemu/target
Alex Bennée f9f99d7ca5 target/arm: Implement SEL2 physical and virtual timers
When FEAT_SEL2 was implemented the SEL2 timers were missed. This
shows up when building the latest Hafnium with SPMC_AT_EL=2. The
actual implementation utilises the same logic as the rest of the
timers so all we need to do is:

  - define the timers and their access functions
  - conditionally add the correct system registers
  - create a new accessfn as the rules are subtly different to the
    existing secure timer

Fixes: e9152ee91c (target/arm: add ARMv8.4-SEL2 system registers)
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20250204125009.2281315-7-peter.maydell@linaro.org
Cc: qemu-stable@nongnu.org
Cc: Andrei Homescu <ahomescu@google.com>
Cc: Arve Hjønnevåg <arve@google.com>
Cc: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
[PMM: CP_ACCESS_TRAP_UNCATEGORIZED -> CP_ACCESS_UNDEFINED;
 offset logic now in gt_{indirect,direct}_access_timer_offset() ]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-03-07 10:08:21 +00:00
..
alpha target/alpha: Do not mix exception flags and FPCR bits 2025-03-06 15:46:18 +01:00
arm target/arm: Implement SEL2 physical and virtual timers 2025-03-07 10:08:21 +00:00
avr target: Set disassemble_info::endian value for little-endian targets 2025-03-06 15:46:18 +01:00
hexagon target: Set disassemble_info::endian value for little-endian targets 2025-03-06 15:46:18 +01:00
hppa target: Set disassemble_info::endian value for big-endian targets 2025-03-06 15:46:18 +01:00
i386 target/i386: Mark WHPX APIC region as little-endian 2025-03-06 15:46:18 +01:00
loongarch target: Set disassemble_info::endian value for little-endian targets 2025-03-06 15:46:18 +01:00
m68k target: Set disassemble_info::endian value for big-endian targets 2025-03-06 15:46:18 +01:00
microblaze target/microblaze: Set disassemble_info::endian value in disas_set_info 2025-03-06 15:46:18 +01:00
mips target/mips: Set disassemble_info::endian value in disas_set_info() 2025-03-06 15:46:18 +01:00
openrisc target: Set disassemble_info::endian value for big-endian targets 2025-03-06 15:46:18 +01:00
ppc target/ppc: Set disassemble_info::endian value in disas_set_info() 2025-03-06 15:46:18 +01:00
riscv Generic CPUs / accelerators patch queue 2025-03-07 07:39:49 +08:00
rx target: Set disassemble_info::endian value for little-endian targets 2025-03-06 15:46:18 +01:00
s390x target: Set disassemble_info::endian value for big-endian targets 2025-03-06 15:46:18 +01:00
sh4 target/sh4: Set disassemble_info::endian value in disas_set_info() 2025-03-06 15:46:18 +01:00
sparc Generic CPUs / accelerators patch queue 2025-03-07 07:39:49 +08:00
tricore target/tricore: Ensure not being build on user emulation 2025-03-06 15:46:18 +01:00
xtensa target/xtensa: Finalize config in xtensa_register_core() 2025-03-06 15:46:18 +01:00
Kconfig target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00
meson.build target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00