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b3f4144fa9
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
50 lines
1.3 KiB
C
50 lines
1.3 KiB
C
/*
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* SPDX-License-Identifier: GPL-2.0-or-later
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* Atomic store insert into 128-bit, generic version.
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*
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* Copyright (C) 2023 Linaro, Ltd.
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*/
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#ifndef HOST_STORE_INSERT_AL16_H
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#define HOST_STORE_INSERT_AL16_H
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/**
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* store_atom_insert_al16:
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* @p: host address
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* @val: shifted value to store
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* @msk: mask for value to store
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*
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* Atomically store @val to @p masked by @msk.
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*/
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static inline void ATTRIBUTE_ATOMIC128_OPT
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store_atom_insert_al16(Int128 *ps, Int128 val, Int128 msk)
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{
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#if defined(CONFIG_ATOMIC128)
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__uint128_t *pu;
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Int128Alias old, new;
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/* With CONFIG_ATOMIC128, we can avoid the memory barriers. */
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pu = __builtin_assume_aligned(ps, 16);
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old.u = *pu;
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msk = int128_not(msk);
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do {
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new.s = int128_and(old.s, msk);
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new.s = int128_or(new.s, val);
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} while (!__atomic_compare_exchange_n(pu, &old.u, new.u, true,
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__ATOMIC_RELAXED, __ATOMIC_RELAXED));
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#else
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Int128 old, new, cmp;
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ps = __builtin_assume_aligned(ps, 16);
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old = *ps;
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msk = int128_not(msk);
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do {
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cmp = old;
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new = int128_and(old, msk);
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new = int128_or(new, val);
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old = atomic16_cmpxchg(ps, cmp, new);
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} while (int128_ne(cmp, old));
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#endif
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}
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#endif /* HOST_STORE_INSERT_AL16_H */
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