qemu/target
Philippe Mathieu-Daudé f5e67b6dda target/arm: Move has_work() from CPUClass to SysemuCPUOps
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250125170125.32855-6-philmd@linaro.org>
2025-03-09 17:00:47 +01:00
..
alpha target/alpha: Move has_work() from CPUClass to SysemuCPUOps 2025-03-09 17:00:47 +01:00
arm target/arm: Move has_work() from CPUClass to SysemuCPUOps 2025-03-09 17:00:47 +01:00
avr exec: Declare tlb_set_page() in 'exec/cputlb.h' 2025-03-08 07:56:14 -08:00
hexagon target: Set disassemble_info::endian value for little-endian targets 2025-03-06 15:46:18 +01:00
hppa exec: Declare tlb_flush*() in 'exec/cputlb.h' 2025-03-08 07:56:14 -08:00
i386 exec: Declare tlb_flush*() in 'exec/cputlb.h' 2025-03-08 07:56:14 -08:00
loongarch include/qemu: Tidy atomic128 headers. 2025-03-09 11:45:00 +08:00
m68k exec: Declare tlb_set_page() in 'exec/cputlb.h' 2025-03-08 07:56:14 -08:00
microblaze exec: Declare tlb_flush*() in 'exec/cputlb.h' 2025-03-08 07:56:14 -08:00
mips exec: Declare tlb_flush*() in 'exec/cputlb.h' 2025-03-08 07:56:14 -08:00
openrisc exec: Declare tlb_flush*() in 'exec/cputlb.h' 2025-03-08 07:56:14 -08:00
ppc exec: Declare tlb_flush*() in 'exec/cputlb.h' 2025-03-08 07:56:14 -08:00
riscv exec: Declare tlb_flush*() in 'exec/cputlb.h' 2025-03-08 07:56:14 -08:00
rx include/qemu: Tidy atomic128 headers. 2025-03-09 11:45:00 +08:00
s390x exec: Declare tlb_flush*() in 'exec/cputlb.h' 2025-03-08 07:56:14 -08:00
sh4 exec: Declare tlb_set_page() in 'exec/cputlb.h' 2025-03-08 07:56:14 -08:00
sparc exec: Declare tlb_flush*() in 'exec/cputlb.h' 2025-03-08 07:56:14 -08:00
tricore exec: Declare tlb_set_page() in 'exec/cputlb.h' 2025-03-08 07:56:14 -08:00
xtensa exec: Declare tlb_flush*() in 'exec/cputlb.h' 2025-03-08 07:56:14 -08:00
Kconfig target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00
meson.build target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00