qemu/target/riscv/insn_trans
Richard Henderson f33960df5b target/riscv: Tidy trans_rvh.c.inc
Exit early if check_access fails.
Split out do_hlv, do_hsv, do_hlvx subroutines.
Use dest_gpr, get_gpr in the new subroutines.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210823195529.560295-24-richard.henderson@linaro.org
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-09-01 11:59:12 +10:00
..
trans_privileged.c.inc riscv: Add semihosting support 2021-01-18 10:05:06 +00:00
trans_rva.c.inc target/riscv: Use {get,dest}_gpr for RVA 2021-09-01 11:59:12 +10:00
trans_rvb.c.inc target/riscv: Use gen_shift_imm_fn for slli_uw 2021-09-01 11:59:12 +10:00
trans_rvd.c.inc target/riscv: Use {get,dest}_gpr for RVD 2021-09-01 11:59:12 +10:00
trans_rvf.c.inc target/riscv: Use {get,dest}_gpr for RVF 2021-09-01 11:59:12 +10:00
trans_rvh.c.inc target/riscv: Tidy trans_rvh.c.inc 2021-09-01 11:59:12 +10:00
trans_rvi.c.inc target/riscv: Reorg csr instructions 2021-09-01 11:59:12 +10:00
trans_rvm.c.inc target/riscv: Move gen_* helpers for RVM 2021-09-01 11:59:12 +10:00
trans_rvv.c.inc target/riscv: Add DisasContext to gen_get_gpr, gen_set_gpr 2021-09-01 11:59:12 +10:00