Mark Cave-Ayland c9f4e4d8b6 target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro ... Introduce a new GEN_VSX_HELPER_VSX_MADD macro for the generator function which enables the source and destination registers to be decoded at translation time. This enables the determination of a or m form to be made at translation time so that a single helper function can now be used for both variants. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20190616123751.781-16-mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>		2019-07-02 09:43:58 +10:00
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dfp-impl.inc.c	target/ppc: move FP and VMX registers into aligned vsr register array	2019-01-09 09:28:14 +11:00
dfp-ops.inc.c	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
fp-impl.inc.c	target/ppc: Style fixes for translate/fp-impl.inc.c	2019-04-26 11:37:57 +10:00
fp-ops.inc.c	target/ppc: add external PID support	2018-11-08 12:04:40 +11:00
spe-impl.inc.c	target/ppc: Use tcg_gen_abs_i32	2019-05-13 22:52:08 +00:00
spe-ops.inc.c	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
vmx-impl.inc.c	target/ppc: Use vector variable shifts for VSL, VSR, VSRA	2019-05-29 11:39:45 +10:00
vmx-ops.inc.c	Changes requirement for "vsubsbs" instruction	2018-12-21 09:29:12 +11:00
vsx-impl.inc.c	target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro	2019-07-02 09:43:58 +10:00
vsx-ops.inc.c	target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro	2019-07-02 09:43:58 +10:00