James Hogan eff6ff9431 target/mips: Fix TLBWI shadow flush for EHINV,XI,RI ... Writing specific TLB entries with TLBWI flushes shadow TLB entries unless an existing entry is having its access permissions upgraded. This is necessary as software would from then on expect the previous mapping in that entry to no longer be in effect (even if QEMU has quietly evicted it to the shadow TLB on a TLBWR). However it won't do this if only EHINV, XI, or RI bits have been set, even if that results in a reduction of permissions, so add the necessary checks to invoke the flush when these bits are set. Fixes: 2fb58b7374 ("target-mips: add RI and XI fields to TLB entry") Fixes: 9456c2fbcd ("target-mips: add TLBINV support") Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Yongbok Kim <yongbok.kim@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Tested-by: Yongbok Kim <yongbok.kim@imgtec.com> [yongbok.kim@imgtec.com: cosmetic changes] Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>		2017-07-20 22:42:26 +01:00
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cpu-qom.h	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
cpu.c	qom/cpu: move tlb_flush to cpu_common_reset	2017-01-13 14:24:31 +00:00
cpu.h	target-mips: Provide function to test if a CPU supports an ISA	2017-02-21 22:24:58 +00:00
dsp_helper.c	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
gdbstub.c	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
helper.c	mips: set CP0 Debug DExcCode for SDBBP instruction	2017-07-17 16:48:21 +02:00
helper.h	target-mips: Use clz opcode	2017-01-10 08:06:11 -08:00
kvm.c	vcpu_dirty: share the same field in CPUState for all accelerators	2017-07-04 14:30:03 +02:00
kvm_mips.h	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
lmi_helper.c	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
machine.c	migration: extend VMStateInfo	2017-01-24 17:54:47 +00:00
Makefile.objs	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
mips-defs.h	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
mips-semi.c	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
msa_helper.c	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
op_helper.c	target/mips: Fix TLBWI shadow flush for EHINV,XI,RI	2017-07-20 22:42:26 +01:00
TODO	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
trace-events	target-mips: replace few LOG_DISAS() with trace points	2017-03-20 11:06:32 +00:00
translate.c	target/mips: Fix MIPS64 MFC0 UserLocal on BE host	2017-07-20 22:42:26 +01:00
translate_init.c	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00