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CpuModelInfo member @props is semantically a mapping from name to value, and syntactically a JSON object on the wire. This translates to QDict in C. Since the QAPI schema language lacks the means to express 'object', we use 'any' instead. This is QObject in C. Commands taking a CpuModelInfo argument need to check the QObject is a QDict. For arm, riscv, and s390x, the code checks right before passing the QObject to visit_start_struct(). visit_start_struct() then checks again. Delete the first check. The error message for @props that are not an object changes slightly to the the message we get for this kind of type error in other contexts. Minor improvement. Additionally, error messages about members of @props now refer to 'props.prop-name' instead of just 'prop-name'. Another minor improvement. Both changes are visible in tests/qtest/arm-cpu-features.c. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20240305145919.2186971-2-armbru@redhat.com> Acked-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> [Drop #include now superfluous]
240 lines
7.2 KiB
C
240 lines
7.2 KiB
C
/*
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* QEMU CPU QMP commands for RISC-V
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*
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* Copyright (c) 2023 Ventana Micro Systems Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qapi/qapi-commands-machine-target.h"
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#include "qapi/qmp/qbool.h"
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#include "qapi/qmp/qdict.h"
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#include "qapi/qobject-input-visitor.h"
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#include "qapi/visitor.h"
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#include "qom/qom-qobject.h"
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#include "sysemu/kvm.h"
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#include "sysemu/tcg.h"
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#include "cpu-qom.h"
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#include "cpu.h"
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static void riscv_cpu_add_definition(gpointer data, gpointer user_data)
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{
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ObjectClass *oc = data;
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CpuDefinitionInfoList **cpu_list = user_data;
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CpuDefinitionInfo *info = g_malloc0(sizeof(*info));
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const char *typename = object_class_get_name(oc);
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ObjectClass *dyn_class;
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info->name = cpu_model_from_type(typename);
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info->q_typename = g_strdup(typename);
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dyn_class = object_class_dynamic_cast(oc, TYPE_RISCV_DYNAMIC_CPU);
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info->q_static = dyn_class == NULL;
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QAPI_LIST_PREPEND(*cpu_list, info);
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}
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CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)
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{
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CpuDefinitionInfoList *cpu_list = NULL;
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GSList *list = object_class_get_list(TYPE_RISCV_CPU, false);
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g_slist_foreach(list, riscv_cpu_add_definition, &cpu_list);
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g_slist_free(list);
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return cpu_list;
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}
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static void riscv_check_if_cpu_available(RISCVCPU *cpu, Error **errp)
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{
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if (!riscv_cpu_accelerator_compatible(cpu)) {
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g_autofree char *name = riscv_cpu_get_name(cpu);
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const char *accel = kvm_enabled() ? "kvm" : "tcg";
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error_setg(errp, "'%s' CPU not available with %s", name, accel);
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return;
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}
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}
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static void riscv_obj_add_qdict_prop(Object *obj, QDict *qdict_out,
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const char *name)
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{
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ObjectProperty *prop = object_property_find(obj, name);
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if (prop) {
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QObject *value;
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assert(prop->get);
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value = object_property_get_qobject(obj, name, &error_abort);
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qdict_put_obj(qdict_out, name, value);
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}
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}
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static void riscv_obj_add_multiext_props(Object *obj, QDict *qdict_out,
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const RISCVCPUMultiExtConfig *arr)
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{
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for (int i = 0; arr[i].name != NULL; i++) {
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riscv_obj_add_qdict_prop(obj, qdict_out, arr[i].name);
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}
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}
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static void riscv_obj_add_named_feats_qdict(Object *obj, QDict *qdict_out)
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{
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const RISCVCPUMultiExtConfig *named_cfg;
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RISCVCPU *cpu = RISCV_CPU(obj);
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QObject *value;
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bool flag_val;
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for (int i = 0; riscv_cpu_named_features[i].name != NULL; i++) {
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named_cfg = &riscv_cpu_named_features[i];
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flag_val = isa_ext_is_enabled(cpu, named_cfg->offset);
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value = QOBJECT(qbool_from_bool(flag_val));
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qdict_put_obj(qdict_out, named_cfg->name, value);
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}
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}
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static void riscv_obj_add_profiles_qdict(Object *obj, QDict *qdict_out)
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{
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RISCVCPUProfile *profile;
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QObject *value;
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for (int i = 0; riscv_profiles[i] != NULL; i++) {
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profile = riscv_profiles[i];
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value = QOBJECT(qbool_from_bool(profile->enabled));
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qdict_put_obj(qdict_out, profile->name, value);
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}
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}
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static void riscv_cpuobj_validate_qdict_in(Object *obj, QObject *props,
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Error **errp)
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{
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const QDict *qdict_in;
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const QDictEntry *qe;
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Visitor *visitor;
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Error *local_err = NULL;
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visitor = qobject_input_visitor_new(props);
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if (!visit_start_struct(visitor, "props", NULL, 0, &local_err)) {
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goto err;
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}
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qdict_in = qobject_to(QDict, props);
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for (qe = qdict_first(qdict_in); qe; qe = qdict_next(qdict_in, qe)) {
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object_property_find_err(obj, qe->key, &local_err);
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if (local_err) {
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goto err;
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}
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object_property_set(obj, qe->key, visitor, &local_err);
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if (local_err) {
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goto err;
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}
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}
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visit_check_struct(visitor, &local_err);
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if (local_err) {
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goto err;
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}
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visit_end_struct(visitor, NULL);
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err:
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error_propagate(errp, local_err);
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visit_free(visitor);
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}
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CpuModelExpansionInfo *qmp_query_cpu_model_expansion(CpuModelExpansionType type,
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CpuModelInfo *model,
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Error **errp)
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{
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CpuModelExpansionInfo *expansion_info;
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QDict *qdict_out;
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ObjectClass *oc;
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Object *obj;
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Error *local_err = NULL;
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if (type != CPU_MODEL_EXPANSION_TYPE_FULL) {
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error_setg(errp, "The requested expansion type is not supported");
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return NULL;
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}
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oc = cpu_class_by_name(TYPE_RISCV_CPU, model->name);
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if (!oc) {
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error_setg(errp, "The CPU type '%s' is not a known RISC-V CPU type",
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model->name);
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return NULL;
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}
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obj = object_new(object_class_get_name(oc));
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riscv_check_if_cpu_available(RISCV_CPU(obj), &local_err);
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if (local_err != NULL) {
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error_propagate(errp, local_err);
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object_unref(obj);
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return NULL;
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}
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if (model->props) {
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riscv_cpuobj_validate_qdict_in(obj, model->props, &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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object_unref(obj);
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return NULL;
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}
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}
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riscv_cpu_finalize_features(RISCV_CPU(obj), &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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object_unref(obj);
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return NULL;
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}
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expansion_info = g_new0(CpuModelExpansionInfo, 1);
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expansion_info->model = g_malloc0(sizeof(*expansion_info->model));
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expansion_info->model->name = g_strdup(model->name);
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qdict_out = qdict_new();
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riscv_obj_add_multiext_props(obj, qdict_out, riscv_cpu_extensions);
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riscv_obj_add_multiext_props(obj, qdict_out, riscv_cpu_experimental_exts);
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riscv_obj_add_multiext_props(obj, qdict_out, riscv_cpu_vendor_exts);
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riscv_obj_add_named_feats_qdict(obj, qdict_out);
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riscv_obj_add_profiles_qdict(obj, qdict_out);
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/* Add our CPU boolean options too */
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riscv_obj_add_qdict_prop(obj, qdict_out, "mmu");
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riscv_obj_add_qdict_prop(obj, qdict_out, "pmp");
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if (!qdict_size(qdict_out)) {
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qobject_unref(qdict_out);
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} else {
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expansion_info->model->props = QOBJECT(qdict_out);
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}
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object_unref(obj);
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return expansion_info;
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}
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